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* spi: spi-mem: stm32-qspi: avoid memory corruption at low frequencyLudovic Barre2019-03-151-3/+1
| | | | | | | | This patch solves a memory corruption seen at 8 MHz. To avoid such issue, timeout counter is disabled. Signed-off-by: Ludovic Barre <[email protected]> Signed-off-by: Mark Brown <[email protected]>
* spi: spi-mem: add stm32 qspi controllerLudovic Barre2018-10-191-0/+512
The qspi controller is a specialized communication interface targeting single, dual or quad SPI Flash memories (NOR/NAND). It can operate in any of the following modes: -indirect mode: all the operations are performed using the quadspi registers -read memory-mapped mode: the external Flash memory is mapped to the microcontroller address space and is seen by the system as if it was an internal memory tested on: -NOR: mx66l51235l -NAND: MT29F2G01ABAGD Signed-off-by: Ludovic Barre <[email protected]> Signed-off-by: Mark Brown <[email protected]>