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* platform/x86/intel/pmc: Remove unnecessary declarations in headerXi Pardee2025-02-241-17/+17
| | | | | | | | | | | Remove unnecessary declarations in header file. Variable that are used by only one .c file are removed from header file and changed to be static in their corresponding .c file. Signed-off-by: Xi Pardee <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Ilpo Järvinen <[email protected]> Signed-off-by: Ilpo Järvinen <[email protected]>
* platform/x86/intel/pmc: Remove simple init functionsXi Pardee2025-02-101-6/+1
| | | | | | | | | | | | Remove simple init functions to avoid duplicate code. Store init function performing architecture specific action in the corresponding pmc_dev_info structure. Replace init function with pmc_dev_info structure in X86_MATCH_VFM() of core.c. Signed-off-by: Xi Pardee <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Ilpo Järvinen <[email protected]> Signed-off-by: Ilpo Järvinen <[email protected]>
* platform/x86:intel/pmc: Create generic_core_init() for all platformsXi Pardee2025-02-101-14/+7
| | | | | | | | | | | | | | Create a generic_core_init() function for all architectures to reduce duplicate code in each architecture file. Create an info structure to catch the variations between each architecture and pass it to the generic init function. Convert all architectures to call the generic core init function. Signed-off-by: Xi Pardee <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Ilpo Järvinen <[email protected]> Signed-off-by: Ilpo Järvinen <[email protected]>
* platform/x86:intel/pmc: Revert "Enable the ACPI PM Timer to be turned off ↵Marek Maslanka2024-10-211-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | when suspended" Commit e86c8186d03a ("platform/x86:intel/pmc: Enable the ACPI PM Timer to be turned off when suspended") can cause the suspend process to hang as the pmcdev->lock in the pmc_core_acpi_pm_timer_suspend_resume might already be held by the pmc_core_mphy_pg_show or pmc_core_pll_show if the userspace gets frozen when these functions are being executed. Also, pmc_core_acpi_pm_timer_suspend_resume must not sleep, as this function is called indirectly by the tick_freeze function in kernel/time/tick-common.c, which holds the spinlock. Revert the changes for now to fix these issues. Fixes: e86c8186d03a ("platform/x86:intel/pmc: Enable the ACPI PM Timer to be turned off when suspended") Reported-by: Luca Coelho <[email protected]> Closes: https://lore.kernel.org/lkml/[email protected]/ Signed-off-by: Marek Maslanka <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
* platform/x86:intel/pmc: Enable the ACPI PM Timer to be turned off when suspendedMarek Maslanka2024-09-061-0/+2
| | | | | | | | | | | | | | | | Allow to disable ACPI PM Timer on suspend and enable on resume. A disabled timer helps optimise power consumption when the system is suspended. On resume the timer is only reactivated if it was activated prior to suspend, so unless the ACPI PM timer is enabled in the BIOS, this won't change anything. The ACPI PM timer is used by Intel's iTCO/wdat_wdt watchdog to drive the watchdog, so it doesn't need to run during suspend. Signed-off-by: Marek Maslanka <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Daniel Lezcano <[email protected]>
* Merge tag 'platform-drivers-x86-v6.7-6' into pdx86/for-nextHans de Goede2024-01-021-6/+3
|\ | | | | | | | | | | | | Merge the 'platform-drivers-x86-v6.7-6' fixes into pdx86/for-next so that the "Intel PMC GBE LTR regression" fixes can also be applied to the new Arrow Lake and Lunar Lake platform support code in pdx86/for-next .
| * platform/x86/intel/pmc: Move GBE LTR ignore to suspend callbackDavid E. Box2023-12-291-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()") caused a network performance regression due to the GBE LTR ignore that it added at probe. This was needed in order to allow the SoC to enter the deepest Package C state. To fix the regression and at least support PC10 during suspend, move the LTR ignore from probe to the suspend callback, and enable it again on resume. This solution will allow PC10 during suspend but restrict Package C entry at runtime to no deeper than PC8/9 while a network cable it attach to the PCH LAN. Fixes: 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()") Signed-off-by: "David E. Box" <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Ilpo Järvinen <[email protected]> Signed-off-by: Ilpo Järvinen <[email protected]>
| * platform/x86/intel/pmc: Allow reenabling LTRsDavid E. Box2023-12-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()") caused a network performance regression due to the GBE LTR ignore that it added during probe. The fix will move the ignore to occur at suspend-time (so as to not affect suspend power). This will require the ability to enable the LTR again on resume. Modify pmc_core_send_ltr_ignore() to allow enabling an LTR. Fixes: 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()") Signed-off-by: "David E. Box" <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Ilpo Järvinen <[email protected]> Signed-off-by: Ilpo Järvinen <[email protected]>
* | platform/x86/intel/pmc: Add PSON residency counter for Alder LakeRajvi Jingar2023-12-191-0/+2
| | | | | | | | | | | | | | | | | | | | Add PSON register offsets for Alder Lake PCH that provides an access to PSON residency counter. Signed-off-by: Rajvi Jingar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
* | platform/x86:intel/pmc: Call pmc_get_low_power_modes from platform initXi Pardee2023-12-041-0/+2
|/ | | | | | | | | | | | | | In order to setup a table of low power mode requirements for Meteor Lake, pmc_core_get_low_power_modes() will need to be run from platform init code so that the enabled modes are known, allowing the use of the pmc_for_each_mode helper. Make the function global and call it from the platform init code. Signed-off-by: Xi Pardee <[email protected]> Signed-off-by: David E. Box <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
* platform/x86:intel/pmc: Add support to handle multiple PMCsXi Pardee2023-06-201-2/+3
| | | | | | | | | | To support platforms with multiple PMCs, add a PMC device structure to support each PMC instance. Signed-off-by: Xi Pardee <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
* platform/x86:intel/pmc: Combine core_init() and core_configure()Xi Pardee2023-06-201-6/+9
| | | | | | | | | | Combine core_init() and core_configure() functions to have a cleaner setup for platforms. Signed-off-by: Xi Pardee <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
* platform/x86: intel/pmc: Relocate Alder Lake PCH supportGayatri Kammela2022-11-211-0/+325
Create adl.c for Alder Lake PCH specific structures and init(). This file supports Alder Lake, Raptor Lake and Raptor Lake S platforms There are no functional changes involved. Cc: David E Box <[email protected]> Reviewed-by: "David E. Box" <[email protected]> Signed-off-by: Gayatri Kammela <[email protected]> Signed-off-by: "David E. Box" <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>