| Commit message (Collapse) | Author | Age | Files | Lines |
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This complex cleanup.h use case of conditional guards has proved
to be more trouble that it is worth in terms of false positive compiler
warnings and hard to read code.
Move directly to the new claim/release_direct() that allow sparse
to check for unbalanced context.
Cc: João Paulo Gonçalves <[email protected]>
Reviewed-by: David Lechner <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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This complex cleanup.h use case of conditional guards has proved
to be more trouble that it is worth in terms of false positive compiler
warnings and hard to read code.
Move directly to the new claim/release_direct() that allow sparse
to check for unbalanced context
Reviewed-by: David Lechner <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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This complex cleanup.h use case of conditional guards has proved
to be more trouble that it is worth in terms of false positive compiler
warnings and hard to read code.
Move directly to the new claim/release_direct() that allow sparse
to check for unbalanced context
Reviewed-by: ChiYuan Huang <[email protected]>
Reviewed-by: David Lechner <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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This complex cleanup.h use case of conditional guards has proved
to be more trouble that it is worth in terms of false positive compiler
warnings and hard to read code.
Move directly to the new claim/release_direct() that allow sparse
to check for unbalanced context.
Reviewed-by: David Lechner <[email protected]>
Reviewed-by: Nuno Sa <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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This complex cleanup.h use case of conditional guards has proved
to be more trouble that it is worth in terms of false positive compiler
warnings and hard to read code.
Move directly to the new claim/release_direct() that allow sparse
to check for unbalanced context. Also use guard() to simplify mutex
unlock paths.
Reviewed-by: David Lechner <[email protected]>
Reviewed-by: Nuno Sa <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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This complex cleanup.h use case of conditional guards has proved
to be more trouble that it is worth in terms of false positive compiler
warnings and hard to read code.
Move directly to the new claim/release_direct() that allow sparse
to check for unbalanced context.
Cc: Ramona Alexandra Nechita <[email protected]>
Reviewed-by: David Lechner <[email protected]>
Reviewed-by: Nuno Sa <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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This complex cleanup.h use case of conditional guards has proved
to be more trouble that it is worth in terms of false positive compiler
warnings and hard to read code.
Move directly to the new claim/release_direct() that allow sparse
to check for unbalanced context.
Reviewed-by: Trevor Gamblin <[email protected]>
Reviewed-by: David Lechner <[email protected]>
Reviewed-by: Nuno Sa <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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This complex cleanup.h use case of conditional guards has proved
to be more trouble that it is worth in terms of false positive compiler
warnings and hard to read code.
Move directly to the new claim/release_direct() that allow sparse
to check for unbalanced context.
Cc: Guillaume Stols <[email protected]>
Reviewed-by: David Lechner <[email protected]>
Reviewed-by: Nuno Sa <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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This complex cleanup.h use case of conditional guards has proved
to be more trouble that it is worth in terms of false positive compiler
warnings and hard to read code.
Move directly to the new claim/release_direct() that allow sparse
to check for unbalanced context. In some cases code is factored
out to utility functions that can do a direct return with the
claim and release around the call.
Reviewed-by: David Lechner <[email protected]>
Reviewed-by: Nuno Sa <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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This complex cleanup.h use case of conditional guards has proved
to be more trouble that it is worth in terms of false positive compiler
warnings and hard to read code.
Move directly to the new claim/release_direct() that allow sparse
to check for unbalanced context.
Cc: Cosmin Tanislav <[email protected]>
Reviewed-by: David Lechner <[email protected]>
Reviewed-by: Nuno Sa <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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This complex cleanup.h use case of conditional guards has proved
to be more trouble that it is worth in terms of false positive compiler
warnings and hard to read code.
Move directly to the new claim/release_direct() that allow sparse
to check for unbalanced context.
Reviewed-by: Marcelo Schmitt <[email protected]>
Tested-by: Marcelo Schmitt <[email protected]>
Reviewed-by: David Lechner <[email protected]>
Reviewed-by: Nuno Sa <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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Add driver for ADS7128 and ADS7138 12-bit, 8-channel analog-to-digital
converters. These ADCs have a wide operating range and a wide feature
set. Communication is based on the I2C interface.
ADS7128 differs in the addition of further hardware features, like a
root-mean-square (RMS) and a zero-crossing-detect (ZCD) module.
Signed-off-by: Tobias Sperling <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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AD4632-24 and AD4632-16 are 2 channels ADCs. Both channels are
interleaved bit per bit on SDO line.
Both of them do not have evaluation board. As such, the support added
here can't be tested. Support is provided as best effort until someone get
their hands on one.
Signed-off-by: Esteban Blanc <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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AD4630-24 and AD4630-16 are 2 channels ADCs. Both channels are
interleaved bit per bit on SDO line.
Signed-off-by: Esteban Blanc <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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This add support for the averaging mode of AD4030 using oversampling IIO
attribute
Signed-off-by: Esteban Blanc <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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This adds a new driver for the Analog Devices INC. AD4030-24 ADC.
The driver implements basic support for the AD4030-24 1 channel
differential ADC with hardware gain and offset control.
Signed-off-by: Esteban Blanc <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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Add support for the AD485X a fully buffered, 8-channel simultaneous
sampling, 16/20-bit, 1 MSPS data acquisition system (DAS) with
differential, wide common-mode range inputs.
Signed-off-by: Antoniu Miclaus <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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Add support for enabling/disabling oversampling.
Signed-off-by: Antoniu Miclaus <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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Add support for selecting the data format within the AXI ADC ip.
Add separate complatible string for the custom AD485X IP and implement
the necessary changes.
Reviewed-by: Nuno Sa <[email protected]>
Signed-off-by: Antoniu Miclaus <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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Add support for getting the interface (CMOS or LVDS) used by the AXI ADC
IP.
Reviewed-by: Nuno Sa <[email protected]>
Reviewed-by: David Lechner <[email protected]>
Signed-off-by: Antoniu Miclaus <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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Add the logic for effectively enabling the software mode for the
iio-backend, i.e. enabling the software mode channel configuration and
implementing the register writing functions.
Signed-off-by: Guillaume Stols <[email protected]>
Co-developed-by: Angelo Dureghello <[email protected]>
Signed-off-by: Angelo Dureghello <[email protected]>
Link: https://patch.msgid.link/20250210-wip-bl-ad7606_add_backend_sw_mode-v4-9-160df18b1da7@baylibre.com
Signed-off-by: Jonathan Cameron <[email protected]>
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Add the possibility to pass the *_available parameters to the main
macro.
This is a preparation to add the new channels for software mode and
hardware mode in iio backend mode more easily.
Signed-off-by: Guillaume Stols <[email protected]>
Link: https://patch.msgid.link/20250210-wip-bl-ad7606_add_backend_sw_mode-v4-8-160df18b1da7@baylibre.com
Signed-off-by: Jonathan Cameron <[email protected]>
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Protect register (and bus) access from concurrent
read / write. Needed in the backend operating mode.
Signed-off-by: Angelo Dureghello <[email protected]>
Link: https://patch.msgid.link/20250210-wip-bl-ad7606_add_backend_sw_mode-v4-7-160df18b1da7@baylibre.com
Signed-off-by: Jonathan Cameron <[email protected]>
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Since we must access the bus parallel bus using a custom procedure,
let's add a specialized compatible, and define specialized callbacks for
writing the registers using the parallel interface.
Signed-off-by: Guillaume Stols <[email protected]>
Co-developed-by: Angelo Dureghello <[email protected]>
Signed-off-by: Angelo Dureghello <[email protected]>
Link: https://patch.msgid.link/20250210-wip-bl-ad7606_add_backend_sw_mode-v4-6-160df18b1da7@baylibre.com
Signed-off-by: Jonathan Cameron <[email protected]>
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This is a preparation for the next commit adding support for register
read and write functions on AD7606.
Since sometimes a bus will be used, it has been agreed during ad3552's
driver implementation that the device's driver bus is the backend, whose
device node will be a child node.
To provide the special callbacks for setting the register, axi-adc needs
to pass them to the child device's driver through platform data.
Signed-off-by: Angelo Dureghello <[email protected]>
Link: https://patch.msgid.link/20250210-wip-bl-ad7606_add_backend_sw_mode-v4-5-160df18b1da7@baylibre.com
Signed-off-by: Jonathan Cameron <[email protected]>
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Add struct axi_adc_info to allow different axi-adc compatibles that can
be added to this generic implementation.
Signed-off-by: Angelo Dureghello <[email protected]>
Link: https://patch.msgid.link/20250210-wip-bl-ad7606_add_backend_sw_mode-v4-4-160df18b1da7@baylibre.com
Signed-off-by: Jonathan Cameron <[email protected]>
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Since the register are always the same, whatever bus is used, moving the
software functions into the main file avoids the code to be duplicated
in both SPI and parallel version of the driver.
Signed-off-by: Guillaume Stols <[email protected]>
Co-developed-by: Angelo Dureghello <[email protected]>
Signed-off-by: Angelo Dureghello <[email protected]>
Link: https://patch.msgid.link/20250210-wip-bl-ad7606_add_backend_sw_mode-v4-3-160df18b1da7@baylibre.com
Signed-off-by: Jonathan Cameron <[email protected]>
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This is a preparation for the intoduction of the sofware functions in
the iio backend version of the driver.
The software mode configuration must be executed once the channels are
configured, and the number of channels is known. This is not the case
before iio-backend's configuration is called, and iio backend version of
the driver does not have a timestamp channel.
Also the sw_mode_config callback is configured during the iio-backend
configuration.
For clarity purpose, I moved the entire block instead of just the
concerned function calls.
Signed-off-by: Guillaume Stols <[email protected]>
Link: https://patch.msgid.link/20250210-wip-bl-ad7606_add_backend_sw_mode-v4-2-160df18b1da7@baylibre.com
Signed-off-by: Jonathan Cameron <[email protected]>
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Add support for the ad4695's oversampling feature when SPI offload is
available. This allows the ad4695 to set oversampling ratios on a
per-channel basis, raising the effective-number-of-bits from 16
(OSR == 1) to 17 (4), 18 (16), or 19 (64) for a given sample (i.e. one
full cycle through the auto-sequencer). The logic for reading and
writing sampling frequency for a given channel is also adjusted based on
the current oversampling ratio.
The non-offload case isn't supported as there isn't a good way to
trigger the CNV pin in this mode. Support could be added in the future
if a use-case arises.
Signed-off-by: Trevor Gamblin <[email protected]>
Reviewed-by: Nuno Sa <[email protected]>
Tested-by: David Lechner <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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Add support for SPI offload to the ad4695 driver. SPI offload allows
sampling data at the max sample rate (500kSPS or 1MSPS).
This is developed and tested against the ADI example FPGA design for
this family of ADCs [1].
[1]: http://analogdevicesinc.github.io/hdl/projects/ad469x_fmc/index.html
Reviewed-by: Nuno Sa <[email protected]>
Signed-off-by: David Lechner <[email protected]>
Link: https://patch.msgid.link/20250207-dlech-mainline-spi-engine-offload-2-v8-14-e48a489be48c@baylibre.com
Signed-off-by: Jonathan Cameron <[email protected]>
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Add support for SPI offload to the ad7944 driver. This allows reading
data at the max sample rate of 2.5 MSPS.
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Nuno Sa <[email protected]>
Signed-off-by: David Lechner <[email protected]>
Link: https://patch.msgid.link/20250207-dlech-mainline-spi-engine-offload-2-v8-11-e48a489be48c@baylibre.com
Signed-off-by: Jonathan Cameron <[email protected]>
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Replace use of storagebits with realbits for determining the number of
bytes needed for SPI transfers.
When adding SPI offload support, storagebits will always be 32 rather
than 16 for 16-bit 16-bit chips so we can no longer rely on storagebits
being the correct size expected by the SPI framework (it always uses
4 bytes for > 16-bit xfers and 2 bytes for > 8-bit xfers). Instead,
derive the correct size from realbits since it will always be correct
even when SPI offloading is used.
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-vy: Nuno Sa <[email protected]>
Signed-off-by: David Lechner <[email protected]>
Link: https://patch.msgid.link/20250207-dlech-mainline-spi-engine-offload-2-v8-10-e48a489be48c@baylibre.com
Signed-off-by: Jonathan Cameron <[email protected]>
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Refactor the IIO dmaengine buffer code to split requesting the DMA
channel from allocating the buffer. We want to be able to add a new
function where the IIO device driver manages the DMA channel, so these
two actions need to be separate.
To do this, calling dma_request_chan() is moved from
iio_dmaengine_buffer_alloc() to iio_dmaengine_buffer_setup_ext(). A new
__iio_dmaengine_buffer_setup_ext() helper function is added to simplify
error unwinding and will also be used by a new function in a later
patch.
iio_dmaengine_buffer_free() now only frees the buffer and does not
release the DMA channel. A new iio_dmaengine_buffer_teardown() function
is added to unwind everything done in iio_dmaengine_buffer_setup_ext().
This keeps things more symmetrical with obvious pairs alloc/free and
setup/teardown.
Calling dma_get_slave_caps() in iio_dmaengine_buffer_alloc() is moved so
that we can avoid any gotos for error unwinding.
Reviewed-by: Nuno Sa <[email protected]>
Signed-off-by: David Lechner <[email protected]>
Link: https://patch.msgid.link/20250207-dlech-mainline-spi-engine-offload-2-v8-8-e48a489be48c@baylibre.com
Signed-off-by: Jonathan Cameron <[email protected]>
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Make filter control also available through filter_type attributes which are
now standardized in main IIO ABI documentation.
Suggested-by: David Lechner <[email protected]>
Signed-off-by: Marcelo Schmitt <[email protected]>
Reviewed-by: David Lechner <[email protected]>
Link: https://patch.msgid.link/61a87b288552cad9e925a9af4eb33022d14a4617.1738680728.git.marcelo.schmitt@analog.com
Signed-off-by: Jonathan Cameron <[email protected]>
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If one or more of the 16 channels are enabled and the driver is not
aware of that, unexpected things happen because different channels are
used than intended. To prevent that, all channels should be disabled at
probe time. In Commit 4be339af334c ("iio: adc: ad7124: Disable all
channels at probe time") I intended do that, however only the channels
that are potentially used by the driver and not all channels are
disabled since then. So disable all 16 channels and not only the used
ones.
Also fix the same issue in the .disable_all() callback.
Fixes: 4be339af334c ("iio: adc: ad7124: Disable all channels at probe time")
Signed-off-by: Uwe Kleine-König <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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Some chips of the ad7173 family supports open wire detection.
Generate a level fault event whenever an external source is disconnected
from the system input on single conversions.
Reviewed-by: Nuno Sa <[email protected]>
Signed-off-by: Guillaume Ranquet <[email protected]>
Reviewed-by: David Lechner <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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The key objective in ad7124_disable_one() is clearing the
AD7124_CHANNEL_EN_MSK bit in the channel register. However there is no
advantage to keep the other bits in that register because when the
channel is used next time, all fields are rewritten anyhow. So instead
of using ad7124_spi_write_mask() (which is a register read plus a
register write) use a simple register write clearing the complete
register.
Also do the same in the .disable_all() callback by using the
.disable_one() callback there.
Signed-off-by: Uwe Kleine-König <[email protected]>
Reviewed-by: Nuno Sa <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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According to Documentation/timers/delay_sleep_functions.rst,
fsleep() is the preferred delay function to be used in non-atomic
context, so switch to it accordingly.
Suggested-by: Andy Shevchenko <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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Add a custom implementation of regmap read/write callbacks using the SPI
bus. This allows them to be performed at a lower SCLK rate than data
reads. Previously, all SPI transfers were being performed at a lower
speed, but with this change sample data is read at the max bus speed
while the register reads/writes remain at the lower rate.
Also remove .can_multi_write from the AD4695 driver's regmap_configs, as
this isn't implemented or needed.
For some background context, see:
https://lore.kernel.org/linux-iio/[email protected]/
Suggested-by: David Lechner <[email protected]>
Signed-off-by: Trevor Gamblin <[email protected]>
Reviewed-by: David Lechner <[email protected]>
Tested-by: David Lechner <[email protected]>
Link: https://patch.msgid.link/20241113-tgamblin-ad4695_improvements-v2-3-b6bb7c758fc4@baylibre.com
Signed-off-by: Jonathan Cameron <[email protected]>
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Ensure that conversion mode is successfully exited when the command is
issued by adding an extra transfer beforehand, matching the minimum CNV
high and low times from the AD4695 datasheet. The AD4695 has a quirk
where the exit command only works during a conversion, so guarantee this
happens by triggering a conversion in ad4695_exit_conversion_mode().
Then make this even more robust by ensuring that the exit command is run
at AD4695_REG_ACCESS_SCLK_HZ rather than the bus maximum.
Signed-off-by: Trevor Gamblin <[email protected]>
Reviewed-by: David Lechner <[email protected]>
Tested-by: David Lechner <[email protected]>
Link: https://patch.msgid.link/20241113-tgamblin-ad4695_improvements-v2-2-b6bb7c758fc4@baylibre.com
Signed-off-by: Jonathan Cameron <[email protected]>
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The ad7625 driver was submitted under a dual BSD/GPL license, but this
isn't a requirement for the code, and adds extra complexity. To make it
consistent with similar drivers, drop the BSD tag and leave it as
GPL-2.0-only.
Suggested-by: Nuno Sa <[email protected]>
Signed-off-by: Trevor Gamblin <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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Use two separate static const struct ad_sigma_delta_info instances
instead of making a copy for each driver instance.
Typically in the IIO subsystem, we use multiple static const instances
of the same struct when there are different variants of the same family
of devices as opposed to making a copy for each driver instance and
modifying it.
Signed-off-by: David Lechner <[email protected]>
Link: https://patch.msgid.link/20250113-iio-adc-ad7313-fix-non-const-info-struct-v4-2-b63be3ecac4a@baylibre.com
Signed-off-by: Jonathan Cameron <[email protected]>
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Move the call to fwnode_irq_get_byname() from the driver-specific
ad7173_fw_parse_device_config() to the shared ad_sd_init() function.
The main reason for this is that we want struct ad_sigma_delta_info to
be static const data that describes the actual ADC chip, not the
application-specific configuration or any runtime state.
Previously, this struct was being used to pass the IRQ number to the
shared ad_sd_init() function. Now, this is replaced by a boolean flag
that is set at compile time and the ad_sd_init() function handles
looking up the IRQ number instead. This also has the added benefit that
if any other drivers need to make use of this in the future, they just
have to set the flag and the shared code will take care of the rest
rather than duplicating the code in each driver.
Signed-off-by: David Lechner <[email protected]>
Link: https://patch.msgid.link/20250113-iio-adc-ad7313-fix-non-const-info-struct-v4-1-b63be3ecac4a@baylibre.com
Signed-off-by: Jonathan Cameron <[email protected]>
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There's no reason to check for regulator supply property presence before
calling devm_regulator_get_optional() as that will return -ENODEV if
the supply is not present.
Signed-off-by: Rob Herring (Arm) <[email protected]>
Acked-by: Fabrice Gasnier <[email protected]>
Tested-by: Fabrice Gasnier <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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The alert functionality is an out of range indicator and can be used as
an early indicator of an out of bounds conversion result.
ALERT_LOW_THRESHOLD and ALERT_HIGH_THRESHOLD registers are common to all
channels.
When using 1 SDO line (only mode supported by the driver right now), i.e
data outputs only on SDOA, SDOB (or SDOD for 4 channels variants) is
used as an alert pin. The alert pin is updated at the end of the
conversion (set to low if an alert occurs) and is cleared on a falling
edge of CS.
The ALERT register contains information about the exact alert status:
channel and direction. ALERT register can be accessed using debugfs if
enabled.
User can set high/low thresholds and enable alert detection using the
regular iio events attributes:
events/in_thresh_falling_value events/in_thresh_rising_value
events/thresh_either_en
In most use cases, user will hardwire the alert pin to trigger a shutdown.
In theory, we could generate userspace IIO events for alerts, but this
is not implemented yet for several reasons [1]. This can be implemented
later if a real use case actually requires it.
Signed-off-by: Julien Stephan <[email protected]>
[1] https://lore.kernel.org/all/[email protected]/
Reviewed-by: David Lechner <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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Since regmap cache is now enabled, we don't need to store the
oversampling ratio in the private data structure.
Reviewed-by: David Lechner <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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Enable regmap cache, to avoid useless access on spi bus.
Reviewed-by: David Lechner <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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Conditionnal scoped handlers are turning out to be a real pain:
readability issues, compiler and linker handling issues among others so
rollback and remove the scoped version of iio_dvice_claim_direct_mode.
To impove code readability factorize code to set oversampling ratio.
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"Core changes:
- None really.
New drivers:
- AMD ISP411 "AMD ISP" driver
- Exynos 2200 and 7870 SoC subdrivers
- Sophgo RISC-V SG2042 and SG2044 subdrivers
- Amlogic A4 subdriver
- Rockchip RK3528 subdriver
- Broadcom BCM21664 subdriver
- Allwinner A523/T527 subdriver
- Ingenic X1600 subdriver
- Microchip SAMA7D65 subdriver, essentially a re-branded Atmel AT91
PIO4 driver, but nowadays a Microschip SoC line
Improvements:
- Bring in the devm_kmemdup_array() helper and use it throughout,
also bring in changes to other subsystems for this to establish
this helper
- Support EGPIO on the Qualcomm SA8775P SoC
- Extend EINT support in the Mediatek driver"
* tag 'pinctrl-v6.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (101 commits)
pinctrl: mediatek: Add EINT support for multiple addresses
pinctrl: amlogic-a4: Drop surplus semicolon
pinctrl: nuvoton: Reduce use of OF-specific APIs
pinctrl: nuvoton: Convert to use struct group_desc
pinctrl: nuvoton: Make use of struct pinfunction and PINCTRL_PINFUNCTION()
pinctrl: nuvoton: Convert to use struct pingroup and PINCTRL_PINGROUP()
pinctrl: npcm8xx: Fix incorrect struct npcm8xx_pincfg assignment
pinctrl: tegra: Fix off by one in tegra_pinctrl_get_group()
pinctrl: PINCTRL_AMDISP should depend on DRM_AMD_ISP
pinctrl: qcom: sa8775p: Enable egpio function
dt-bindings: pinctrl: qcom: Add egpio function for sa8775p
pinctrl: qcom: tlmm-test: Validate irq_enable delivers edge irqs
pinctrl: qcom: Clear latched interrupt status when changing IRQ type
dt-bindings: pinctrl: airoha: Add missing gpio-ranges property
pinctrl: bcm281xx: Add missing assignment in bcm21664_pinctrl_lock_all()
pinctrl: amd: isp411: Fix IS_ERR() vs NULL check in probe()
dt-bindings: pinctrl: at91-pio4: add microchip,sama7d65-pinctrl
pinctrl: tegra: Set SFIO mode to Mux Register
pinctrl-tegra: Restore SFSEL bit when freeing pins
pinctrl: tegra: Add descriptions for SoC data fields
...
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Convert to use devm_kmemdup_array() and while at it, use source size
instead of destination.
Signed-off-by: Raag Jadav <[email protected]>
Acked-by: Jonathan Cameron <[email protected]>
Signed-off-by: Andy Shevchenko <[email protected]>
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