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path: root/drivers/gpu/drm/i915/display/intel_dpio_phy.c
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* drm/i915/dpio: switch to display->platform based platform detectionJani Nikula2025-04-171-3/+1
* drm/i915/dpio: have chv_data_lane_soft_reset() get/put dpio internallyJani Nikula2025-04-141-5/+16
* drm/i915: Simplify vlv_wait_port_ready() argumentsVille Syrjälä2025-02-151-5/+5
* drm/i915: Relocate vlv_wait_port_ready()Ville Syrjälä2025-02-151-0/+34
* drm/i915/display: fix typos in i915/display filesNitin Gote2025-01-231-1/+1
* drm/i915/uncore: add to_intel_uncore() and use itJani Nikula2024-12-161-0/+1
* drm/i915/display: convert power wells to struct intel_displayJani Nikula2024-12-021-3/+4
* drm/i915/dpio: convert to struct intel_displayJani Nikula2024-10-301-80/+78
* drm/i915/dpio: Extract vlv_dpio_phy_regs.hVille Syrjälä2024-04-301-0/+1
* drm/i915/dpio: Clean up the vlv/chv PHY register bitsVille Syrjälä2024-04-301-31/+28
* drm/i915/dpio: Clean up VLV/CHV DPIO PHY register definesVille Syrjälä2024-04-301-1/+1
* drm/i915/dpio: Rename a few CHV DPIO PHY registersVille Syrjälä2024-04-301-8/+8
* drm/i915/dpio: Give VLV DPIO group register a clearer nameVille Syrjälä2024-04-301-17/+17
* drm/i915/dpio: Derive the phy from the port rather than pipe in encoder hooksVille Syrjälä2024-04-301-16/+11
* drm/i915/dpio: s/port/ch/Ville Syrjälä2024-04-301-22/+22
* drm/i915/dpio: Remove pointless VLV_PCS01_DW8 readVille Syrjälä2024-04-301-1/+0
* drm/i915/dpio: Program bxt/glk PHY TX registers per-laneVille Syrjälä2024-04-191-13/+22
* drm/i915/dpio: s/ddi/dpio/ for bxt/glk PHY stuffVille Syrjälä2024-04-191-61/+61
* drm/i915/dpio: Use intel_de_rmw() for BXT DPIO latency optim setupVille Syrjälä2024-04-191-9/+3
* drm/i915/dpio: Introdude bxt_ddi_phy_rmw_grp()Ville Syrjälä2024-04-191-21/+38
* drm/i915/dpio: Extract bxt_dpio_phy_regs.hVille Syrjälä2024-04-191-0/+1
* drm/i915/dpio: Add per-lane PHY TX register definitons for bxt/glkVille Syrjälä2024-04-191-3/+3
* drm/i915/dpio: Clean up bxt/glk PHY registersVille Syrjälä2024-04-191-22/+22
* drm/i915/display: prefer intel_de_wait*() functions over uncore onesJani Nikula2024-03-261-5/+2
* drm/i915: convert vlv_dpio_read()/write() from pipe to phyJani Nikula2023-11-171-77/+80
* drm/i915: add vlv_pipe_to_phy() helper to replace DPIO_PHY()Jani Nikula2023-11-171-0/+14
* drm/i915/display/phys: use intel_de_rmw if possibleAndrzej Hajda2023-02-161-34/+15
* drm/i915: move chv_dpll_md and bxt_phy_grc to display sub-struct under stateJani Nikula2023-01-181-4/+5
* drm/i915: stop including i915_irq.h from i915_trace.hJani Nikula2022-11-111-0/+1
* drm/i915/dpio: un-inline the vlv phy/channel mapping functionsJani Nikula2022-11-031-0/+42
* drm/i915: move and group power related members under display.powerJani Nikula2022-08-311-1/+1
* drm/i915: Move per-platform power well hooks to intel_display_power_well.cImre Deak2022-04-201-0/+1
* drm/i915: split out vlv sideband to a separate fileJani Nikula2021-10-141-3/+2
* drm/i915: Pass the lane to intel_ddi_level()Ville Syrjälä2021-10-041-1/+1
* drm/i915: Hoover the level>=n_entries WARN into intel_ddi_level()Ville Syrjälä2021-10-041-2/+0
* drm/i915: De-wrapper bxt_ddi_phy_set_signal_levels()Ville Syrjälä2021-10-041-9/+21
* drm/i915: Don't include intel_de.h from intel_display_types.hVille Syrjälä2021-05-051-0/+1
* drm/i915: Plumb crtc_state to link trainingVille Syrjälä2020-10-011-11/+12
* drm/i915/display: prefer dig_port to reference intel_digital_portLucas De Marchi2020-07-021-19/+19
* drm/i915/dpio_phy: convert to drm_device based logging macros.Wambui Karuga2020-02-111-12/+16
* drm/i915/display: Make WARN* drm specific where drm_device ptr is availablePankaj Bharadiya2020-02-041-1/+2
* drm/i915/dpio_phy: use intel_de_*() functions for register accessJani Nikula2020-01-271-37/+40
* drm/i915: Pass intel_encoder to enc_to_*()Ville Syrjälä2020-01-131-9/+9
* drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi.Maarten Lankhorst2019-11-011-7/+7
* drm/i915: Wrappers for display register waitsDaniele Ceraolo Spurio2019-08-161-4/+2
* drm/i915: rename intel_drv.h to display/intel_display_types.hJani Nikula2019-08-071-1/+1
* drm/i915: move modesetting core code under display/Jani Nikula2019-06-171-0/+1088
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