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* drm/amdgpu: fix amdgpu_cs_p1_user_fenceChristian König2023-08-311-14/+4
| | | | | | | | | | | | | The offset is just 32bits here so this can potentially overflow if somebody specifies a large value. Instead reduce the size to calculate the last possible offset. The error handling path incorrectly drops the reference to the user fence BO resulting in potential reference count underflow. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: revise the device initialization sequencesEvan Quan2023-08-311-16/+21
| | | | | | | | | | By placing the sysfs interfaces creation after `.late_int`. Since some operations performed during `.late_init` may affect how the sysfs interfaces should be created. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: introduce a new set of OD interfacesEvan Quan2023-08-313-2/+266
| | | | | | | | | | | There will be multiple interfaces(sysfs files) exposed with each representing a single OD functionality. And all those interface will be arranged in a tree liked hierarchy with the top dir as "gpu_od". Meanwhile all functionalities for the same component will be arranged under the same directory. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add UMSCH IP BLOCK TYPE definitionLang Yu2023-08-311-0/+2
| | | | | | | | | | Add IP BLOCK TYPE definition for Multimedia User Mode Scheduler which is a hardware scheduler for VCN and VPE workload. Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Reviewed-by: Veerabadhran Gopalakrishnan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/pm: Optimize emit_clock_levels for arcturus - part 3Darren Powell2023-08-311-53/+24
| | | | | | | | | split switch statement into two and consolidate the common code for printing most of the types of clock speeds Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add UMSCH 4.0 register headersLang Yu2023-08-312-0/+1304
| | | | | | | | | | | Add headers for UMSCH 4.0. v2: updates (Alex) Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Reviewed-by: Veerabadhran Gopalakrishnan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: enable PG flags for VCNSaleemkhan Jamadar2023-08-311-0/+2
| | | | | | | | Enable PG flags for VCN and Jpeg on IP 11_5_0 Signed-off-by: Saleemkhan Jamadar <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu/discovery: add VCN 4.0.5 SupportSaleemkhan Jamadar2023-08-311-0/+6
| | | | | | | | Enable VCN 4.0.5 on gc 11_5_0. Signed-off-by: Saleemkhan Jamadar <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu/soc21: Add video cap query support for VCN_4_0_5Saleemkhan Jamadar2023-08-311-0/+1
| | | | | | | | Added the video capability query support for VCN version 4_0_5 Signed-off-by: Saleemkhan Jamadar <[email protected]> Reviewed-by: Veerabadhran Gopalakrishnan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu:enable CG and PG flags for VCNSaleemkhan Jamadar2023-08-311-2/+4
| | | | | | | | Enable CG and PG flags for VCN on IP 11_5_0 Signed-off-by: Saleemkhan Jamadar <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add VCN_4_0_5 firmware supportSaleemkhan Jamadar2023-08-311-0/+2
| | | | | | | | Add VCN_4_0_5 firmware support Signed-off-by: Saleemkhan Jamadar <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu/jpeg: add jpeg support for VCN4_0_5Saleemkhan Jamadar2023-08-313-1/+658
| | | | | | | | | | Add jpeg support for VCN4_0_5 v2 - update license year (Leo Liu) Signed-off-by: Saleemkhan Jamadar <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add VCN4 ip block supportSaleemkhan Jamadar2023-08-313-0/+1815
| | | | | | | | | | Add VCN 4.0.5 initialization and decoder/encoder ring functions. v2 - update license year (Leo Liu) Signed-off-by: Saleemkhan Jamadar <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add vcn 4_0_5 header filesSaleemkhan Jamadar2023-08-312-0/+10411
| | | | | | | | | | | Add VCN 4.0.5 registers v2 - Add license header (Alexander Deucher) v3 - updates (Alex) Signed-off-by: Saleemkhan Jamadar <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: fix VPE front door loading issueLang Yu2023-08-316-0/+63
| | | | | | | Implement proper front door loading for vpe 6.1. Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add VPE FW version query supportLang Yu2023-08-311-0/+12
| | | | | | | Add support to query VPE FW version. Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: enable VPE for VPE 6.1.0Lang Yu2023-08-311-0/+19
| | | | | | | | Enable Video Processing Engine on SoCs that contain VPE 6.1.0. Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add user space CS support for VPELang Yu2023-08-313-0/+9
| | | | | | | Enable command submission to VPE from user space. Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add PSP loading support for VPELang Yu2023-08-312-0/+28
| | | | | | | Add PSP loading support for Video Processing Engine. Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add VPE 6.1.0 supportLang Yu2023-08-316-0/+1019
| | | | | | | | | Add skeleton driver code. (Ray) Add initial support for Video Processing Engine. (Lang) Signed-off-by: Huang Rui <[email protected]> Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add nbio 7.11 callback for VPELang Yu2023-08-311-0/+24
| | | | | | | Add nbio callback to configure doorbell settings. Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add nbio callback for VPELang Yu2023-08-311-0/+2
| | | | | | | Add nbio callback to configure doorbell settings. Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add PSP FW TYPE for VPELang Yu2023-08-312-0/+8
| | | | | | | Add PSP FW TYPE for Video Processing Engine. Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add UCODE ID for VPELang Yu2023-08-311-0/+2
| | | | | | | Add UCODE ID for Video Processing Engine. Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add support for VPE firmware name decodingLang Yu2023-08-311-0/+3
| | | | | | | Add decoding VPE firmware name support. Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add doorbell index for VPELang Yu2023-08-312-2/+6
| | | | | | | Add doorbell index for Video Processing Engine. Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add irq src id definitions for VPELang Yu2023-08-311-0/+40
| | | | | | | | The irq src id is used to route interrupts to the corresponding handlers. Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add IH CLIENT ID for VPELang Yu2023-08-311-0/+2
| | | | | | | | Add Interrupt Handler Client ID for Video Processing Engine. Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add HWID for VPELang Yu2023-08-312-0/+3
| | | | | | | Add HWID for Video Processing Engine. Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add VPE firmware interfaceLang Yu2023-08-311-0/+217
| | | | | | | | | | | Add initial firmware interface. (Ray) Add more opcodes and rename to vpe_v6_1. (Lang) v2: Update copyright date (Alex) Signed-off-by: Huang Rui <[email protected]> Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add VPE firmware header definitionLang Yu2023-08-311-0/+13
| | | | | | | Add firmware header definition for Video Processing Engine. Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add VPE HW IP BLOCK definitionHuang Rui2023-08-311-0/+1
| | | | | | | Add HW IP BLOCK for Video Processing Engine. Signed-off-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add VPE IP BLOCK definitionHuang Rui2023-08-311-0/+1
| | | | | | | Add IP BLOCK for Video Processing Engine. Signed-off-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add VPE RING TYPE definitionHuang Rui2023-08-311-0/+2
| | | | | | | Add RING TYPE for Video Processing Engine. Signed-off-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add VPE 6.1.0 header filesLang Yu2023-08-302-0/+5946
| | | | | | | | | | Add initial headers. (Ray) Update to align with hardware changes. (Lang) Updates (Alex) Signed-off-by: Huang Rui <[email protected]> Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Fix printk_ratelimit() with DRM_ERROR_RATELIMITED in ↵Srinivasan Shanmugam2023-08-301-2/+1
| | | | | | | | | | | | | | | | 'amdgpu_cs_ioctl' Replaced printk_ratelimit() with its DRM equivalent to avoid flooding of dmesg logs & hence fixes the following: WARNING: Prefer printk_ratelimited or pr_<level>_ratelimited to printk_ratelimit + if (printk_ratelimit()) Cc: Christian König <[email protected]> Cc: Alex Deucher <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* Revert "Revert "drm/amd/display: Implement zpos property""Hamza Mahfooz2023-08-301-0/+9
| | | | | | | | | | | | | | This reverts commit e2066eb4efe0e7d2d329d6e6765ed637a523ac45. The problematic IGT test case (i.e. kms_atomic@plane-immutable-zpos) has been fixed as of commit cb77add45011 ("tests/kms_atomic: remove zpos < N-planes assert") to the IGT repo. So, reintroduce the reverted code. Link: https://gitlab.freedesktop.org/drm/igt-gpu-tools/-/commit/cb77add45011b129e21f3cb2a4089a73dde56179 Acked-by: Alex Deucher <[email protected]> Reviewed-by: Melissa Wen <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Use READ_ONCE() when reading the values in ↵Srinivasan Shanmugam2023-08-301-4/+4
| | | | | | | | | | | | | | | | | | | | 'sdma_v4_4_2_ring_get_rptr' Use READ_ONCE() instead of declaring the pointer volatile. To prevent the compiler from refetching or reordering the read, so that the read value is always consistent. Link: https://lwn.net/Articles/624126/ Cc: Felix Kuehling <[email protected]> Cc: Guchun Chen <[email protected]> Cc: Christian König <[email protected]> Cc: Alex Deucher <[email protected]> Cc: "Pan, Xinhui" <[email protected]> Cc: Le Ma <[email protected]> Cc: Hawking Zhang <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: remove unused parameter in amdgpu_vmid_grab_idleYifan Zhang2023-08-301-4/+2
| | | | | | | | amdgpu_vm is not used in amdgpu_vmid_grab_idle. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdkfd: Replace pr_err with dev_errAsad Kamal2023-08-302-47/+71
| | | | | | | | | | Replace pr_err with dev_err to show the bus-id of failing device with kfd queue errors Signed-off-by: Asad Kamal <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/pm: Optimize emit_clock_levels for arcturus - part 2Darren Powell2023-08-301-23/+22
| | | | | | | | | | | | | | Use variables to remove ternary expression in print statement and improve readability. This will help to optimize the code duplication in the switch statement Also Changed: replaced single_dpm_table->count as iterator in for loops with safer clocks_num_levels value replaced dpm_table.value usage with local var clocks_mhz Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/pm: Optimize emit_clock_levels for arcturus - part 1Darren Powell2023-08-301-69/+57
| | | | | | | | | | | | | | Use variables to remove the multiple nested ternary expressions and improve readability. This will help to optimize the code duplication in the switch statement Also Changed: Modify function arcturus_get_clk_table to void function as it always returns 0 Use const string "attempt_string" to cut down on repetition Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdkfd: Add missing gfx11 MQD manager callbacksJay Cornwall2023-08-301-0/+3
| | | | | | | | | | | mqd_stride function was introduced in commit 2f77b9a242a2 ("drm/amdkfd: Update MQD management on multi XCC setup") but not assigned for gfx11. Fixes a NULL dereference in debugfs. Signed-off-by: Jay Cornwall <[email protected]> Signed-off-by: Harish Kasiviswanathan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Free ras cmd input buffer properlyHawking Zhang2023-08-301-7/+7
| | | | | | | | | Do not access the pointer for ras input cmd buffer if it is even not allocated. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Stanley Yang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Adjust kdoc for 'optc35_set_odm_combine'Srinivasan Shanmugam2023-08-301-3/+8
| | | | | | | | | | | | | | | | Fixes the following W=1 kernel build warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn35/dcn35_optc.c:46: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Enable CRTC Cc: Qingqing Zhuo <[email protected]> Cc: Rodrigo Siqueira <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Aurabindo Pillai <[email protected]> Cc: Alex Deucher <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd: Simplify the bo size check funcitonMa Jun2023-08-301-17/+12
| | | | | | | | Simplify the code logic of size check function amdgpu_bo_validate_size Signed-off-by: Ma Jun <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Hide xcp partition sysfs under SRIOVRajneesh Bhardwaj2023-08-301-3/+8
| | | | | | | | XCP partitions should not be visible for the VF for GFXIP 9.4.3. Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Rajneesh Bhardwaj <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdkfd: ratelimited SQ interrupt messagesHarish Kasiviswanathan2023-08-303-9/+9
| | | | | | | | | No functional change. Use ratelimited version of pr_ to avoid overflowing of dmesg buffer Signed-off-by: Harish Kasiviswanathan <[email protected]> Reviewed-by: Philip Yang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: use read-modify-write mode for gfx v9_4_3 SQ settingTao Zhou2023-08-301-1/+2
| | | | | | | | Instead of using direct update, avoid touching unrelated fields. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: access RLC_SPM_MC_CNTL through MMIO in SRIOV runtimeZhenGuo Yin2023-08-302-20/+6
| | | | | | | | | | | Register RLC_SPM_MC_CNTL is not blocked by L1 policy, VF can directly access it through MMIO during SRIOV runtime. v2: use SOC15 interface to access registers Acked-by: Alex Deucher <[email protected]> Signed-off-by: ZhenGuo Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
generated by cgit (git 2.51.2) at 2025-12-01 05:31:47 +0000