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path: root/drivers/gpu/drm/amd/pm/amdgpu_pm.c
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* drm/amd/pm: enable pp_dpm_vclk/dclk interface for smu_v13_0_7Kenneth Feng2022-05-051-2/+4
| | | | | | | | enable pp_dpm_vclk/dclk interface for smu_v13_0_7 Signed-off-by: Kenneth Feng <[email protected]> Reviewed-by: Jack Gui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: enable more GFX clockgating features for GC 11.0.0Evan Quan2022-05-051-1/+1
| | | | | | | | | Support more GFX clockgating features(3D_CGCG, 3D_CGLS, MGCG, FGCG and PERF_CLK). Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add FGCG supportEvan Quan2022-05-041-0/+1
| | | | | | | | Add the CG flag for Fine Grained Clock Gating. Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/smu: Update SMU13 support for SMU 13.0.0Evan Quan2022-05-041-0/+1
| | | | | | | | | | | | | Modify the common smu13 code and add a new smu 13.0.0 ppt file to handle the smu 13.0.0 specific configuration. v2: squash in typo fix in profile name Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: enable pp_dpm_vclk/dclk sysfs interface support for SMU 13.0.0Evan Quan2022-05-041-2/+4
| | | | | | | | Make the pp_dpm_vclk/dclk sysfs interfaces visible for SMU 13.0.0. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: expand cg_flags from u32 to u64Evan Quan2022-04-081-3/+3
| | | | | | | | | With this, we can support more CG flags. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/pm: Enable sysfs nodes for vclk and dclk for NAVI12Marko Zekovic2022-04-051-2/+4
| | | | | | | | | | | | SMI clock measure API is failing on NAVI12, because sysfs node for pp_dpm_vclk is not existing. Enable sysfs node for pp_dpm_vclk for NAVI12. v2: Also enable sysfs node for pp_dpm_dclk. Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Marko Zekovic <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Add unique_id support for sienna cichlidKent Russell2022-04-011-0/+1
| | | | | | | | | | | | | This is being added to SMU Metrics, so add the required tie-ins in the kernel. Also create the corresponding unique_id sysfs file. v2: Add FW version check, remove SMU mutex v3: Fix style warning v4: Add MP1 IP_VERSION check to FW version check Signed-off-by: Kent Russell <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Use switch case for unique_idKent Russell2022-04-011-4/+9
| | | | | | | | | | | | | | | | | To ease readability, use switch to set unique_id as supported for the supported IP_VERSIONs, and set it to unsupported by default for all other ASICs. This makes it easier to add IP_VERSIONs later on, and makes it obvious that it is not supported by default, instead of the current logic that assumes that it is supported unless it is not one of the specified IP_VERSIONs. v2: Rebase onto previous IP_VERSION change Signed-off-by: Kent Russell <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: Check feature support using IP versionLijo Lazar2022-03-281-33/+40
| | | | | | | | Instead of ASIC type, use GC and MP1 IP versions for feature support checks. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: fix typos in commentsJulia Lawall2022-03-151-1/+1
| | | | | | | | Various spelling mistakes in comments. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/pm: Disable managing hwmon sysfs attributes for ONEVF modeDanijel Slivka2022-02-241-0/+4
| | | | | | | | | | This patch prohibits performing of set commands on all hwmon attributes through sysfs in ONEVF mode. Signed-off-by: Danijel Slivka <[email protected]> Acked-by: Harish Kasiviswanathan <[email protected]> Reviewed-by: Harish Kasiviswanathan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: enable pm sysfs write for one VF modeYiqing Yao2022-02-161-2/+2
| | | | | | | | | | | | | [why] pm sysfs should be writable in one VF mode as is in passthrough [how] do not remove write access on pm sysfs if device is in one VF mode Fixes: 11c9cc95f818 ("amdgpu/pm: Make sysfs pm attributes as read-only for VFs") Signed-off-by: Yiqing Yao <[email protected]> Reviewed-by: Monk Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/pm: Add emit_clock_levels callsDarren Powell2022-02-111-14/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (v4) Modifications to satisfy checkpatch --strict (v3) Rewrote patchset to order patches as (API, hw impl, usecase) - modified amdgpu_get_pp_od_clk_voltage to try amdgpu_dpm_emit_clock_levels and fallback to amdgpu_dpm_print_clock_levels if emit is not implemented. - modified amdgpu_get_pp_dpm_clock to try amdgpu_dpm_emit_clock_levels and fallback to amdgpu_dpm_print_clock_levels if emit is not implemented. - Newline is printed to buf if no output produced == Test == LOGFILE=pp_clk.test.log AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON} lspci -nn | grep "VGA\|Display" > $LOGFILE FILES="pp_od_clk_voltage pp_dpm_sclk pp_dpm_mclk pp_dpm_pcie pp_dpm_socclk pp_dpm_fclk pp_dpm_dcefclk pp_dpm_vclk pp_dpm_dclk " for f in $FILES do echo === $f === >> $LOGFILE cat $HWMON_DIR/device/$f >> $LOGFILE done cat $LOGFILE Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: correct hwmon power label nameYang Wang2022-02-091-3/+7
| | | | | | | | | only vangogh has 2 types of hwmon power node: "fastPPT" and "slowPPT", the other asic only has 1 type of hwmon power node: "PPT". Signed-off-by: Yang Wang <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: fix hwmon node of power1_label create issueYang Wang2022-02-091-2/+1
| | | | | | | | | | | | | | it will cause hwmon node of power1_label is not created. v2: the hwmon node of "power1_label" is always needed for all ASICs. and the patch will remove ASIC type check for "power1_label". Fixes: ae07970a0621d6 ("drm/amd/pm: add support for hwmon control of slow and fast PPT limit on vangogh") Signed-off-by: Yang Wang <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu/UAPI: add new CTX OP to get/set stable pstatesAlex Deucher2022-01-271-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | Add a new CTX ioctl operation to set stable pstates for profiling. When creating traces for tools like RGP or using SPM or doing performance profiling, it's required to enable a special stable profiling power state on the GPU. These profiling states set fixed clocks and disable certain other power features like powergating which may impact the results. Historically, these profiling pstates were enabled via sysfs, but this adds an interface to enable it via the CTX ioctl from the application. Since the power state is global only one application can set it at a time, so if multiple applications try and use it only the first will get it, the ioctl will return -EBUSY for others. The sysfs interface will override whatever has been set by this interface. Mesa MR: https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/207 v2: don't default r = 0; v3: rebase on Evan's PM cleanup Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: Enable sysfs required by rocm-smi tool for One VF modeMarina Nikolic2022-01-181-15/+2
| | | | | | | | | | | | Enable power level, power limit and fan speed information retrieval in one VF mode. This is required so that tool ROCM-SMI can provide this information to users. Signed-off-by: Marina Nikolic <[email protected]> Acked-by: Evan Quan <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: fix null ptr accessFlora Cui2022-01-141-0/+3
| | | | | | | | | | check null ptr first before access its element v2: check adev->pm.dpm_enabled early in amdgpu_debugfs_pm_init() Signed-off-by: Flora Cui <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: correct the checks for fan attributes supportEvan Quan2022-01-141-11/+10
| | | | | | | | | | | On functionality unsupported, -EOPNOTSUPP will be returned. And we rely on that to determine the fan attributes support. Fixes: 79c65f3fcbb128 ("drm/amd/pm: do not expose power implementation details to amdgpu_pm.c") Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu/pm: move additional logic into amdgpu_dpm_force_performance_levelAlex Deucher2022-01-141-50/+0
| | | | | | | | This is part of the forced performance level. Move it from the sysfs handler into amdgpu_dpm_force_performance_level. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: revise the performance level setting APIsEvan Quan2022-01-141-4/+25
| | | | | | | | | Avoid cross callings which make lock protection enforcement on amdgpu_dpm_force_performance_level() impossible. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: do not expose the smu_context structure used internally in powerEvan Quan2022-01-141-1/+1
| | | | | | | | | This can cover the power implementation details. And as what did for powerplay framework, we hook the smu_context to adev->powerplay.pp_handle. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: move pp_force_state_enabled member to amdgpu_pm structureEvan Quan2022-01-141-3/+3
| | | | | | | | | As it lables an internal pm state and amdgpu_pm structure is the more proper place than amdgpu_device structure for it. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: do not expose power implementation details to amdgpu_pm.cEvan Quan2022-01-141-336/+181
| | | | | | | | | | amdgpu_pm.c holds all the user sysfs/hwmon interfaces. It's another client of our power APIs. It's not proper to spike into power implementation details there. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/pm: Make sysfs pm attributes as read-only for VFsMarina Nikolic2021-12-301-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | == Description == Setting values of pm attributes through sysfs should not be allowed in SRIOV mode. These calls will not be processed by FW anyway, but error handling on sysfs level should be improved. == Changes == This patch prohibits performing of all set commands in SRIOV mode on sysfs level. It offers better error handling as calls that are not allowed will not be propagated further. == Test == Writing to any sysfs file in passthrough mode will succeed. Writing to any sysfs file in ONEVF mode will yield error: "calling process does not have sufficient permission to execute a command". Signed-off-by: Marina Nikolic <[email protected]> Acked-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Enable unique_id for AldebaranKent Russell2021-12-301-1/+2
| | | | | | | | It's supported, so support the unique_id sysfs file Signed-off-by: Kent Russell <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/pm: Create shared array of power profile name stringsDarren Powell2021-12-011-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | == Description == All the power profile modes use the same strings (or a subset of) Creating a public array of the strings will allow sharing rather than duplicating for each chip First patch only implements change for navi10, followup with other chips == Changes == Create a declaration of the public array in kgd_pp_interface.h Define the public array in amdgpu_pm.c Modify the implementaiton of navi10_get_power_profile_mode to use new array == Test == LOGFILE=pp_profile_strings.test.log AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON} lspci -nn | grep "VGA\|Display" > $LOGFILE FILES="pp_power_profile_mode " for f in $FILES do echo === $f === >> $LOGFILE cat $HWMON_DIR/device/$f >> $LOGFILE done cat $LOGFILE Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: Add debugfs info for STBAndrey Grodzovsky2021-11-221-0/+2
| | | | | | | | | | Add debugfs hook. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu/pm: Don't show pp_power_profile_mode for unsupported devicesMario Limonciello2021-11-031-0/+4
| | | | | | | | | | For ASICs not supporting power profile mode, don't show the attribute. Verify that the function has been implemented by the subsystem. Suggested-by: Alex Deucher <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu/pm: look up current_level for asics without pm callbackAlex Deucher2021-10-281-1/+3
| | | | | | | | | For asics without a callback, use the current level rather than 0xff. This can avoid an unnecesary forced level set on older asics when set by the user. Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: Enable GPU metrics for One VF modeVignesh Chander2021-10-221-7/+7
| | | | | | | | | Enable GPU metrics feature in one VF mode. These are only possible in one VF mode because the VF is dedicated in that case. Signed-off-by: Vignesh Chander <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/amdgpu: Enable some sysnodes for guest smiRoy Sun2021-09-141-2/+2
| | | | | | | | Enable sysnode vclk and dclk on Navi21 asic for guest smi Signed-off-by: Roy Sun <[email protected]> Reviewed-by: Emily.Deng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: enable more pm sysfs under SRIOV 1-VF modeJiawei Gu2021-08-311-4/+4
| | | | | | | | Enable pp_num_states, pp_cur_state, pp_force_state, pp_table sysfs under SRIOV 1-VF scenario. Signed-off-by: Jiawei Gu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: drop the unnecessary intermediate percent-based transitionEvan Quan2021-08-161-12/+8
| | | | | | | | | | Currently, the readout of fan speed pwm is transited into percent-based and then pwm-based. However, the transition into percent-based is totally unnecessary and make the final output less accurate. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: record the RPM and PWM based fan speed settingsEvan Quan2021-08-161-0/+3
| | | | | | | | | | As the relationship "PWM = RPM / smu->fan_max_rpm" between fan speed PWM and RPM is not true for SMU11 ASICs. So, both the RPM and PWM settings need to be saved. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: change pp_dpm_sclk/mclk/fclk attribute is RO for aldebaranKevin Wang2021-08-161-2/+7
| | | | | | | | | | | the following clock is only support voltage DPM, change attribute to RO: 1. pp_dpm_sclk 2. pp_dpm_mclk 3. pp_dpm_fclk Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/pm: Replace amdgpu_pm usage of sprintf with sysfs_emitDarren Powell2021-08-101-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | replacing printfs with sysfs_emit === Test === AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON} LOGFILE=pp_printf.test.log lspci -nn | grep "VGA\|Display" > $LOGFILE FILES="pwm1_enable pwm1_min pwm1_max pwm1 fan1_input fan1_target fan1_enable power1_cap_min " for f in $FILES do echo === $f === >> $LOGFILE cat $HWMON_DIR/device/$f >> $LOGFILE done cat $LOGFILE Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/pm: remove code duplication in show_power_cap callsDarren Powell2021-06-301-74/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v3: updated patch to apply to latest code v2: reorder to check pointers before calling pm_runtime_* functions created generic function and call with enum from * amdgpu_hwmon_show_power_cap_max * amdgpu_hwmon_show_power_cap * amdgpu_hwmon_show_power_cap_default === Test === AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | cut -d " " -f 10` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON} cp pp_show_power_cap.txt{,.old} lspci -nn | grep "VGA\|Display" > pp_show_power_cap.test.log FILES=" power1_cap power1_cap_max power1_cap_default " for f in $FILES do echo $f = `cat $HWMON_DIR/$f` >> pp_show_power_cap.test.log done Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/pm: replaced snprintf usage in amdgpu_pm.c with sysfs_emitDarren Powell2021-06-181-13/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | replaced snprintf usage in amdgpu_pm.c with sysfs_emit fixed warning on comparing int with uint32_t in amdgpu_get_pp_num_states() == Test == AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | cut -d " " -f 10` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON} lspci -nn | grep "VGA\|Display" > scnprintf.test.log FILES="pp_num_states pp_od_clk_voltage pp_features pp_dpm_sclk pp_dpm_mclk pp_dpm_socclk pp_dpm_fclk pp_dpm_vclk pp_dpm_dclk pp_dpm_dcefclk pp_power_profile_mode " for f in $FILES do echo === $f === >> scnprintf.test.log cat $HWMON_DIR/device/$f >> scnprintf.test.log done Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/pm: handle return value for get_power_limitDarren Powell2021-06-081-15/+24
| | | | | | Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/pm: modify and add smu_get_power_limit to Powerplay APIDarren Powell2021-06-081-15/+3
| | | | | | | | | | | | | | | | | | | | modify args of smu_get_power_limit to match Powerplay API .get_power_limit add smu_get_power_limit to Powerplay API swsmu_pm_funcs remove special handling of smu in amdgpu_hwmon_show_power_cap* * Test AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | cut -d " " -f 11` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON} lspci -nn | grep "VGA\|Display" ; \ echo "=== power1 cap ===" ; cat $HWMON_DIR/power1_cap ; \ echo "=== power1 cap max ===" ; cat $HWMON_DIR/power1_cap_max ; \ echo "=== power1 cap def ===" ; cat $HWMON_DIR/power1_cap_default Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/pm: modify Powerplay API get_power_limit to use new pp_power enumsDarren Powell2021-06-081-11/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | updated {amd_pm_funcs}->get_power_limit() signature rewrote pp_get_power_limit to use new enums pp_get_power_limit now returns -EOPNOTSUPP for unknown power limit update calls to {amd_pm_funcs}->get_power_limit() * Test Notes * testing hardware was NAVI10 (tests SMU path) ** needs testing on VANGOGH ** needs testing on SMU < 11 ** ie, one of TOPAZ, FIJI, TONGA, POLARIS10, POLARIS11, POLARIS12, VEGAM, CARRIZO, STONEY, VEGA10, VEGA12,VEGA20, RAVEN, BONAIRE, HAWAII * Test AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | cut -d " " -f 11` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON} lspci -nn | grep "VGA\|Display" ; \ echo "=== power1 cap ===" ; cat $HWMON_DIR/power1_cap ; \ echo "=== power1 cap max ===" ; cat $HWMON_DIR/power1_cap_max ; \ echo "=== power1 cap def ===" ; cat $HWMON_DIR/power1_cap_default Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/pm: clean up smu_get_power_limit function signatureDarren Powell2021-06-081-9/+9
| | | | | | | | | | | | | | | | | | | | | add two new powerplay enums (limit_level, type) add enums to smu_get_power_limit signature remove input bitfield stuffing of output variable limit update calls to smu_get_power_limit * Test AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | cut -d " " -f 11` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON} lspci -nn | grep "VGA\|Display" ; \ echo "=== power1 cap ===" ; cat $HWMON_DIR/power1_cap ; \ echo "=== power1 cap max ===" ; cat $HWMON_DIR/power1_cap_max ; \ echo "=== power1 cap def ===" ; cat $HWMON_DIR/power1_cap_default Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: attr to control SS2.0 bias level (v2)Sathishkumar S2021-06-041-0/+80
| | | | | | | | | | | add sysfs attr to read/write smartshift bias level. document smartshift_bias sysfs attr. V2: add attr to amdgpu_device_attrs and use attr_update (Lijo) Signed-off-by: Sathishkumar S <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: sysfs attrs to read ss powershare (v6)Sathishkumar S2021-06-041-0/+110
| | | | | | | | | | | | | | | add sysfs attrs to read smartshift APU and DGPU power share. document the sysfs device attributes. V2: change variable/macro name for stapm power limit (Lijo) V3: files to be exposed as sysfs device attributes (Alex) V4: check ret value of sysfs create and remove only if created. V5: add ss attrs in amdgpu_device_attrs and use attr_update (Lijo) V6: all checks for ss support to be in if else if statements. (Lijo) Signed-off-by: Sathishkumar S <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: use attr_update if the attr has itSathishkumar S2021-06-021-1/+1
| | | | | | | | | use attr_update if its available as part of the attribute. default_attr_update was used even if attr->attr_update is true. Signed-off-by: Sathishkumar S <[email protected]> Reviewed-by: Shashank Sharma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu/pm: add documentation for pp_od_clock_voltage for vangoghAlex Deucher2021-05-101-1/+13
| | | | | | | Vangogh follows other APUs, but also allows core clock adjustments. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu/pm: add documentation for pp_od_clock_voltage for APUsAlex Deucher2021-05-101-0/+8
| | | | | | | APUs only support adjusting the SCLK domain. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: initialize variableTom Rix2021-05-101-1/+1
| | | | | | | | | | | | | | Static analysis reports this problem amdgpu_pm.c:478:16: warning: The right operand of '<' is a garbage value for (i = 0; i < data.nums; i++) { ^ ~~~~~~~~~ In some cases data is not set. Initialize to 0 and flag not setting data as an error with the existing check. Signed-off-by: Tom Rix <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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