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* drm/amdgpu/pm: move additional logic into amdgpu_dpm_force_performance_levelAlex Deucher2022-01-141-2/+59
| | | | | | | | This is part of the forced performance level. Move it from the sysfs handler into amdgpu_dpm_force_performance_level. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: unified lock protections in amdgpu_dpm.cEvan Quan2022-01-141-183/+524
| | | | | | | | | | As the only entry point, it's now safe and reasonable to enforce the lock protections in amdgpu_dpm.c. And with this, we can drop other internal used power locks. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: do not expose the smu_context structure used internally in powerEvan Quan2022-01-141-16/+34
| | | | | | | | | This can cover the power implementation details. And as what did for powerplay framework, we hook the smu_context to adev->powerplay.pp_handle. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: move those code piece used by Stoney only to smu8_hwmgr.cEvan Quan2022-01-141-14/+0
| | | | | | | | Instead of putting them in amdgpu_dpm.c. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: optimize the amdgpu_pm_compute_clocks() implementationsEvan Quan2022-01-141-179/+21
| | | | | | | | | Drop cross callings and multi-function APIs. Also avoid exposing internal implementations details. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: create a new holder for those APIs used only by legacy ASICs(si/kv)Evan Quan2022-01-141-1008/+14
| | | | | | | | | Those APIs are used only by legacy ASICs(si/kv). They cannot be shared by other ASICs. So, we create a new holder for them. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: do not expose the API used internally only in kv_dpm.cEvan Quan2022-01-141-23/+0
| | | | | | | | Move it to kv_dpm.c instead. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: do not expose those APIs used internally only in si_dpm.cEvan Quan2022-01-141-25/+0
| | | | | | | | Move them to si_dpm.c instead. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: do not expose those APIs used internally only in amdgpu_dpm.cEvan Quan2022-01-141-2/+23
| | | | | | | | Move them to amdgpu_dpm.c instead. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: do not expose power implementation details to displayEvan Quan2022-01-141-0/+218
| | | | | | | | | Display is another client of our power APIs. It's not proper to spike into power implementation details there. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: do not expose power implementation details to amdgpu_pm.cEvan Quan2022-01-141-1/+460
| | | | | | | | | | amdgpu_pm.c holds all the user sysfs/hwmon interfaces. It's another client of our power APIs. It's not proper to spike into power implementation details there. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: do not expose implementation details to other blocks out of powerEvan Quan2022-01-141-0/+90
| | | | | | | | | | Those implementation details(whether swsmu supported, some ppt_funcs supported, accessing internal statistics ...)should be kept internally. It's not a good practice and even error prone to expose implementation details. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: avoid duplicate powergate/ungate settingEvan Quan2021-11-171-0/+10
| | | | | | | | | | | | | | | | | Just bail out if the target IP block is already in the desired powergate/ungate state. This can avoid some duplicate settings which sometimes may cause unexpected issues. Link: https://lore.kernel.org/all/[email protected]/ Bug: https://bugzilla.kernel.org/show_bug.cgi?id=214921 Bug: https://bugzilla.kernel.org/show_bug.cgi?id=215025 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1789 Fixes: bf756fb833cb ("drm/amdgpu: add missing cleanups for Polaris12 UVD/VCE on suspend") Signed-off-by: Evan Quan <[email protected]> Tested-by: Borislav Petkov <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
* drm/amd/pm: unify the interface for power gatingEvan Quan2021-04-091-9/+0
| | | | | | | | No need to have special handling for swSMU supported ASICs. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: unify the interface for loading SMU microcodeEvan Quan2021-04-091-1/+4
| | | | | | | | No need to have special handling for swSMU supported ASICs. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: fix gpu reset failure by MP1 state settingGuchun Chen2021-04-091-3/+0
| | | | | | | | | | Instead of blocking varied unsupported MP1 state in upper level, defer and skip such MP1 state handling in specific ASIC. Signed-off-by: Lijo Lazar <[email protected]> Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: fix MP1 state setting failure in s3 testGuchun Chen2021-04-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Skip PP_MP1_STATE_NONE in MP1 state setting, otherwise, it will break S3 sequence. [ 50.188269] [drm:amdgpu_device_ip_suspend_phase2 [amdgpu]] *ERROR* SMC failed to set mp1 state 0, -22 [ 50.969901] amdgpu 0000:03:00.0: amdgpu: SMU is resuming... [ 50.970024] sd 0:0:0:0: [sda] Starting disk [ 50.979723] serial 00:02: activated [ 51.353644] ata4: SATA link down (SStatus 4 SControl 300) [ 51.353669] ata3: SATA link down (SStatus 4 SControl 300) [ 51.353747] ata6: SATA link down (SStatus 4 SControl 300) [ 51.357694] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) [ 51.357711] ata5: SATA link down (SStatus 4 SControl 300) [ 51.357729] ata2: SATA link down (SStatus 4 SControl 300) [ 51.358005] ata1.00: supports DRM functions and may not be fully accessible [ 51.360491] ata1.00: supports DRM functions and may not be fully accessible [ 51.362573] ata1.00: configured for UDMA/133 [ 51.362610] ahci 0000:00:17.0: port does not support device sleep [ 51.362946] ata1.00: Enabling discard_zeroes_data [ 52.566438] amdgpu 0000:03:00.0: amdgpu: Msg issuing pre-check failed and SMU may be not in the right state! [ 54.126316] amdgpu 0000:03:00.0: amdgpu: Msg issuing pre-check failed and SMU may be not in the right state! [ 54.126317] amdgpu 0000:03:00.0: amdgpu: Failed to SetDriverDramAddr! [ 54.126318] amdgpu 0000:03:00.0: amdgpu: Failed to setup smc hw! [ 54.126319] [drm:amdgpu_device_ip_resume_phase2 [amdgpu]] *ERROR* resume of IP block <smu> failed -62 [ 54.126398] amdgpu 0000:03:00.0: amdgpu: amdgpu_device_ip_resume failed (-62). [ 54.126399] PM: dpm_run_callback(): pci_pm_resume+0x0/0x90 returns -62 [ 54.126403] PM: Device 0000:03:00.0 failed to resume async: error -62 Fixes: 1689fca0d62aa7 ("drm/amd/pm: fix Navi1x runtime resume failure V2") Signed-off-by: Evan Quan <[email protected]> Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/pm: Powerplay API for smu , changed 4 dpm functions to use APIDarren Powell2021-02-261-63/+33
| | | | | | | | | | | | | | | | | | | | | | v2: fix errors and warnings flagged by checkpatch v3: Context mismatch with revision v3 to patch 0003 New Functions smu_get_mclk - implementation of the Powerplay API function get_mclk smu_get_sclk - implementation of the Powerplay API function get_sclk smu_handle_dpm_task - implementation of the Powerplay API function dispatch_tasks Modified Functions smu_dpm_set_power_gate - - modifed arg0 to match Powerplay API set_powergating_by_smu Other Changes removed special smu handling in dpm functions and called through Powerplay API call to smu_dpm_set_power_gate via Powerplay API now locks mutex for UVD and VCE Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/pm: Powerplay API for smu , changed 5 dpm powergating & sensor ↵Darren Powell2021-02-261-58/+28
| | | | | | | | | | | | | | | | | | | | | | | functions to use API v2: add comment to highlight assignment that changes uint32_t value to int fix errors flagged by checkpatch.pl New Functions smu_get_baco_capability() - Implement Powerplay API get_asic_baco_capability smu_baco_set_state() - Implement Powerplay API set_asic_baco_state Modified Functions smu_read_sensor() - modifed signature to match Powerplay API read_sensor Other Changes added 3 above smu Powerplay functions to swsmu_dpm_funcs removed special smu handling in 5 dpm functions and called through Powerplay API Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/pm: Powerplay API for smu , changed 6 dpm reset functions to use APIDarren Powell2021-02-261-32/+14
| | | | | | | | | | | | | | | | | | | Modified Functions smu_set_xgmi_pstate() - modifed arg0 to match Powerplay API set_xgmi_pstate smu_mode2_reset() - modifed arg0 to match Powerplay API asic_reset_mode_2 smu_switch_power_profile() - modifed arg0 to match Powerplay API switch_power_profile smu_set_mp1_state() - modifed arg0 to match Powerplay API set_mp1_state smu_set_df_cstate() - modifed arg0 to match Powerplay API set_df_cstate smu_enable_mgpu_fan_boost() - modifed arg0 to match Powerplay API enable_mgpu_fan_boost Other Changes added above smu reset Powerplay functions to swsmu_dpm_funcs removed special smu handling of above functions and called through Powerplay API Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: skip power profile switch in sriovJingwen Chen2020-12-011-0/+3
| | | | | | | | | power profile switch in vcn need to send SetWorkLoad msg to smu, which is not supported in sriov. Signed-off-by: Jingwen Chen <[email protected]> Reviewed-by: Jiange Zhao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Get DRM dev from adev by inline-fLuben Tuikov2020-08-241-3/+3
| | | | | | | | | Add a static inline adev_to_drm() to obtain the DRM device pointer from an amdgpu_device pointer. Signed-off-by: Luben Tuikov <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: drop log message in amdgpu_dpm_baco_reset()Alex Deucher2020-08-141-2/+0
| | | | | | | | The caller does this now for all reset types. This is now a duplicate call. Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pm: optimize the power related source code layoutEvan Quan2020-08-141-0/+1689
The target is to provide a clear entry point(for power routines). Also this can help to maintain a clear view about the frameworks used on different ASICs. Hopefully all these can make power part more friendly to play with. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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