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* drm/amd/display: Removing duplicate copyright textMarcelo Mendes Spessoto Junior2024-01-051-28/+0
| | | | | | | | mod_freesync header file has duplicated copyright boilerplate. Drop the duplicate. Signed-off-by: Marcelo Mendes Spessoto Junior <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix sending VSC (+ colorimetry) packets for DP/eDP displays ↵Joshua Ashton2024-01-051-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | without PSR The check for sending the vsc infopacket to the display was gated behind PSR (Panel Self Refresh) being enabled. The vsc infopacket also contains the colorimetry (specifically the container color gamut) information for the stream on modern DP. PSR is typically only supported on mobile phone eDP displays, thus this was not getting sent for typical desktop monitors or TV screens. This functionality is needed for proper HDR10 functionality on DP as it wants BT2020 RGB/YCbCr for the container color space. Cc: [email protected] Cc: Harry Wentland <[email protected]> Cc: Xaver Hugl <[email protected]> Cc: Melissa Wen <[email protected]> Fixes: 15f9dfd545a1 ("drm/amd/display: Register Colorspace property for DP and HDMI") Tested-by: Simon Berz <[email protected]> Tested-by: Xaver Hugl <[email protected]> Signed-off-by: Joshua Ashton <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add some functions for Panel ReplayTom Chung2024-01-032-0/+33
| | | | | | | | | | | | | | | | [WHY] Prepare for enabling the Panel Replay feature [HOW] - Add some Panel Replay setting functions in DC - Add the Panel Replay resource in dcn35_resource.c - Add debug masks for Panel Replay Tested-by: Daniel Wheeler <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Reviewed-by: Leo Li <[email protected]> Signed-off-by: Tom Chung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Disable PSR-SU on Parade 0803 TCON againMario Limonciello2023-12-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | When screen brightness is rapidly changed and PSR-SU is enabled the display hangs on panels with this TCON even on the latest DCN 3.1.4 microcode (0x8002a81 at this time). This was disabled previously as commit 072030b17830 ("drm/amd: Disable PSR-SU on Parade 0803 TCON") but reverted as commit 1e66a17ce546 ("Revert "drm/amd: Disable PSR-SU on Parade 0803 TCON"") in favor of testing for a new enough microcode (commit cd2e31a9ab93 ("drm/amd/display: Set minimum requirement for using PSR-SU on Phoenix")). As hangs are still happening specifically with this TCON, disable PSR-SU again for it until it can be root caused. Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: Marc Rossi <[email protected]> Cc: Hamza Mahfooz <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Link: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/2046131 Acked-by: Alex Deucher <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Send PQ bit in AMD VSIFKrunoslav Kovac2023-11-171-2/+4
| | | | | | | | | | | | [WHY & HOW] PB9 bit 5 was added to signal PQ EOTF in AMD vendor specific infoframe. This change sets it when appropriate. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Krunoslav Kovac <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: VSIF v3 set Max Refresh RateMuhammad Ansari2023-10-091-7/+2
| | | | | | | | | | | | | | | | [WHY] FreeSync spec requires PB8 and PB12 to be set to nominal refresh rate regardless of fixed rate or variable [HOW] Removed the condition that checks and overwrites max refresh rate and set PB8/PB12 to be set to max refresh rate always Reviewed-by: Anthony Koo <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Muhammad Ansari <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Clean up code warningsAric Cyr2023-10-041-1/+1
| | | | | | | | | | | | - Fix constness of string parameters - Fix zero-initialization of structs which cannot take a 0 literal as the first field, for example enums Reviewed-by: Dillon Varone <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: fix problems in power_helperWayne Lin2023-10-041-10/+10
| | | | | | | | | | | | | [Why & How] Fix following problems: - In abm config, forget to initialize config.ambient_thresholds_lux. - Adjust the coding style problem - Restrict to call psr_su_set_dsc_slice_height() under edp only Reviewed-by: Robin Chen <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: prevent potential division by zero errorsHamza Mahfooz2023-09-061-3/+6
| | | | | | | | | | | | | | There are two places in apply_below_the_range() where it's possible for a divide by zero error to occur. So, to fix this make sure the divisor is non-zero before attempting the computation in both cases. Cc: [email protected] Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2637 Fixes: a463b263032f ("drm/amd/display: Fix frames_to_insert math") Fixes: ded6119e825a ("drm/amd/display: Reinstate LFC optimization") Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: PQ regamma end pointKrunoslav Kovac2023-08-301-6/+109
| | | | | | | | | | | | | | | | | | | | [WHY & HOW] PQ has a fixed range of 0-10,000 nits. Using 1=80 nits normalization, PQ should map to 1.0 for X=125.0 HW LUT used for interpolation does not have X=125 so it's interpolated. However, we cap Y to 1 for all X>=125. The closest larger HW point is 128. What we want is Y(128) such that interpolation through 125 gives 1.0. Such value is ~1.00256. Another change is to hardcode PQ table, we pretty much always have 1=80 normalization so the table can be static. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Krunoslav Kovac <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Update adaptive sync infopackets for replayBhawanpreet Lakha2023-08-151-0/+5
| | | | | | | | Update infopackets for replay Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Clean up errors in color_gamma.cRan Sun2023-08-091-3/+2
| | | | | | | | | | Fix the following errors reported by checkpatch: ERROR: trailing whitespace ERROR: else should follow close brace '}' Signed-off-by: Ran Sun <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add Freesync Panel DM codeBhawanpreet Lakha2023-08-072-0/+7
| | | | | | | | | We need certain conditions for replay to be enabled, so create an interface in DM to enable/disable replay. Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Limit Minimum FreeSync Refresh RateAustin Zheng2023-06-151-2/+9
| | | | | | | | | | | | | | | Why: Some EDIDs report a minimum refresh rate lower than what HW can support How: Add a check to calculate minimum supported refresh rate with current timing and use that as the minimum if a lower one is passed in Acked-by: Stylon Wang <[email protected]> Signed-off-by: Austin Zheng <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: set variable custom_backlight_curve0 ↵Tom Rix2023-06-091-1/+1
| | | | | | | | | | | | | | storage-class-specifier to static smatch reports drivers/gpu/drm/amd/amdgpu/../display/modules/power/power_helpers.c:119:31: warning: symbol 'custom_backlight_curve0' was not declared. Should it be static? This variable is only used in its defining file, so it should be static Signed-off-by: Tom Rix <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: add option to use custom backlight capsJosip Pavic2023-04-242-0/+46
| | | | | | | | | | | | [Why & How] Provide option for vendors to specify a custom brightness-to-backlight conversion profile. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Josip Pavic <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: remove unused variable oldest_indexTom Rix2023-04-181-4/+0
| | | | | | | | | | | | | cpp_check reports drivers/gpu/drm/amd/display/modules/freesync/freesync.c:1143:17: style: Variable 'oldest_index' is assigned a value that is never used. [unreadVariable] oldest_index = 0; ^ This variable is not used so remove. Signed-off-by: Tom Rix <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: fix a divided-by-zero errorAlex Hung2023-04-181-0/+4
| | | | | | | | | | | | | | | [Why & How] timing.dsc_cfg.num_slices_v can be zero and it is necessary to check before using it. This fixes the error "divide error: 0000 [#1] PREEMPT SMP NOPTI". Reviewed-by: Aurabindo Pillai <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: remove unused average_render_time_in_us and i variablesTom Rix2023-04-111-14/+0
| | | | | | | | | | | | | clang with W=1 reports drivers/gpu/drm/amd/amdgpu/../display/modules/freesync/freesync.c:1132:15: error: variable 'average_render_time_in_us' set but not used [-Werror,-Wunused-but-set-variable] unsigned int average_render_time_in_us = 0; ^ This variable is not used so remove it, which caused i to be unused so remove that as well. Signed-off-by: Tom Rix <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Clean up some inconsistent indentingJiapeng Chong2023-03-271-2/+2
| | | | | | | | | | No functional modification involved. Reported-by: Abaci Robot <[email protected]> Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=4585 Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Drop unnecessary DCN guardsHarry Wentland2023-03-071-7/+0
| | | | | | | | | | | | [Why & How] DC is littered with many DCN guards that are not needed. Drop them. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Drop CONFIG_DRM_AMD_DC_HDCPHarry Wentland2023-03-071-2/+0
| | | | | | | | | | | [Why & How] There is no reason we still need a config option for this. Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* Revert "drm/amd/display: Fix FreeSync active bit issue"Aric Cyr2023-02-281-9/+3
| | | | | | | | | | | | | | This reverts commit 6cfb6df2d645c00513ecf17832928e08979fa953. [Why & How] Original change causes black screen. Revert until fix is available. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Updating Video Format Fall Back Policy.Jasdeep Dhillon2023-02-281-0/+1
| | | | | | | | | | | | [WHY] Adding 1920x1080 as fail safe mode for Video Format Fall Back Policy. Reviewed-by: Jerry Zuo <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Jasdeep Dhillon <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: remove unused _calculate_degamma_curve functionMelissa Wen2023-02-162-89/+0
| | | | | | | | We don't use this function anywhere, therefore, remove it. Reviewed-by: Christian König <[email protected]> Signed-off-by: Melissa Wen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: unset initial value for tf since it's never usedMelissa Wen2023-02-161-2/+2
| | | | | | | | | | | In mod_color_calculate_{degamma/regamma}_params(), a tf variable is initialized as TRANSFER_FUNCTION_SRGB but tf is only used after tf = input->tf, therefore, better to just remove this initial value and avoid misleading interpretations. Reviewed-by: Christian König <[email protected]> Signed-off-by: Melissa Wen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: camel case cleanup in color_gamma fileMelissa Wen2023-02-161-24/+26
| | | | | | | | Rename mapUserRamp to map_user_ramp and doClamping to do_clamping Reviewed-by: Christian König <[email protected]> Signed-off-by: Melissa Wen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix FreeSync active bit issueLeo (Hanghong) Ma2023-02-141-3/+9
| | | | | | | | | | | | | | [Why] The FreeSync active bit unconditionally set in HDMI VSIF. [How] Set this bit to true when FAMS is enable on desktop. Reviewed-by: Felipe Clark <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Leo (Hanghong) Ma <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Enable Freesync over PConSung Joon Kim2023-01-312-4/+4
| | | | | | | | | | | | | | | | [why] Enable Freesync over PCon on Linux environment. [how] Adding Freesync over PCon support in amdgpu_dm - Read DPCD for Freesync over PCon capabilitiy - Add whitelist for compatible branch devices Reviewed-by: Chao-kai Wang <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Sung Joon Kim <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Pass DSC slice height to PSR FWRobin Chen2023-01-242-5/+5
| | | | | | | | | | | | | | | | | | | | | | | [Why] When DSC is enabled, the PSRSU seletive update region must be multiple number of DSC slice height number. The original solution is to overwrite the SU Y granularity by DSC slice height in DAL driver. However, the size of the SU Y granularity variable only has 8 bytes and the DSC slice height may over the 8 bytes size. [How] Instead of overwriting the SU Y granularity value, add a new DSC slice height pararmeter and pass it to DMUB PSRSU FW. The PSRSU FW will refer to the DSC slice height value and extend the SU region. Reviewed-by: Dennis Chan <[email protected]> Reviewed-by: ChunTao Tso <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Robin Chen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Enable AdaptiveSync in DC interfaceSung Joon Kim2023-01-242-0/+91
| | | | | | | | | | | | | | | | | [why] Start enabling AdaptiveSync feature on Linux environment. [how] Adding AdaptiveSync support in DC layer - building AdaptiveSync info_packets - adjusting the v_startup parameter Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Sung Joon Kim <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: set active bit for desktop with VSDBv3Dillon Varone2023-01-171-6/+14
| | | | | | | | | | | When using freesync on desktop, need to set freesync active bit for AMD VSDBv3 infopacket. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Martin Leung <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Remove unused codeRodrigo Siqueira2023-01-171-44/+0
| | | | | | | | Remove some code that is never used from freesync file. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: fix PSR-SU/DSC interoperability supportHamza Mahfooz2023-01-092-0/+34
| | | | | | | | | | | | Currently, there are issues with enabling PSR-SU + DSC. This stems from the fact that DSC imposes a slice height on transmitted video data and we are not conforming to that slice height in PSR-SU regions. So, pass slice_height into su_y_granularity to feed the DSC slice height into PSR-SU code. Acked-by: Harry Wentland <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: new ABM config 2Camille Cho2022-11-231-0/+9
| | | | | | | | | | | | | [Why & How] Add configuration 2 for ABM 2.3/2.4 to suit customer preferences, which is to lower the brightness curves in 80%-100% range compared to the existing default config 0. Reviewed-by: Josip Pavic <[email protected]> Acked-by: Brian Chang <[email protected]> Signed-off-by: Camille Cho <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Set correct EOTF and Gamut flag in VRR infoMike Hsieh2022-11-091-4/+4
| | | | | | | | | | | [Why] FreeSync always use G2.2 EOTF and Native gamut [How] Set EOTF and Gamut flags accordingly Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Mike Hsieh <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Update 709 gamma to 2.222 as stated in the standerdNawwar Ali2022-11-091-1/+1
| | | | | | | | | | | | | | | [WHY] Previously driver use gamma 2.2 for 709 color space, but the standard is to use gamma of 2.222 [HOW] Change it gamma to 2.222 Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Nawwar Ali <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Wrong colorimetry workaroundMa Hanghong2022-10-272-2/+7
| | | | | | | | | | | | | | | | | | | | | | | [Why] For FreeSync HDR, native color space flag in AMD VSIF(BT.709) should be used when intepreting content and color space flag in VSC or AVI infoFrame should be ignored. However, it turned out some userspace application still use color flag in VSC or AVI infoFrame which is incorrect. [How] Transfer function is used when building the VSC and AVI infoFrame. Set colorimetry to BT.709 when all the following match: 1. Pixel format is YCbCr; 2. In FreeSync 2 HDR, color is COLOR_SPACE_2020_YCBCR; 3. Transfer function is TRANSFER_FUNC_GAMMA_22; Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Ma Hanghong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: fix transfer function passed to build_coefficients()Alex Deucher2022-10-111-1/+1
| | | | | | | | | | | | | | | | | | The default argument should be enum TRANSFER_FUNCTION_SRGB rather than the current boolean value which improperly maps to TRANSFER_FUNCTION_BT709. Commit 9b3d76527f6e ("drm/amd/display: Revert adding degamma coefficients") looks to have improperly reverted commit d02097095916 ("drm/amd/display: Add regamma/degamma coefficients and set sRGB when TF is BT709") replacing the enum value with a boolean value. Cc: Krunoslav Kovac <[email protected]> Cc: Jaehyun Chung <[email protected]> Cc: Zeng Heng <[email protected]> Fixes: 9b3d76527f6e ("drm/amd/display: Revert adding degamma coefficients") Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Limit user regamma to a valid valueYao Wang12022-09-131-0/+4
| | | | | | | | | | | | | | | | | | | [Why] For HDR mode, we get total 512 tf_point and after switching to SDR mode we actually get 400 tf_point and the rest of points(401~512) still use dirty value from HDR mode. We should limit the rest of the points to max value. [How] Limit the value when coordinates_x.x > 1, just like what we do in translate_from_linear_space for other re-gamma build paths. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Pavle Kotarac <[email protected]> Signed-off-by: Yao Wang1 <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix HDMI VSIF V3 incorrect issueLeo Ma2022-08-101-12/+3
| | | | | | | | | | | | | | | [Why] Reported from customer the checksum in AMD VSIF V3 is incorrect and causing blank screen issue. [How] Fix the packet length issue on AMD HDMI VSIF V3. Reviewed-by: Anthony Koo <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Leo Ma <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Disable PSRSU when DSC enabled on the specific sinkRobin Chen2022-07-121-16/+17
| | | | | | | | | | | | [Why] Some specific sink is not able to support PSRSU when DSC is turned on. For this case, fall-back to use PSR1. Reviewed-by: Anthony Koo <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Robin Chen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Move all linux includes into OS typesHarry Wentland2022-07-052-5/+0
| | | | | | | | | Move all linux includes into OS types. Acked-by: Alan Liu <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add vrr_active_variable to dc_stream_updateHarry VanZyllDeJong2022-06-152-3/+2
| | | | | | | | | | | | | | | [WHY] The display driver on some OSes need to track it in order to perform memory clock switching decisions. [HOW] Propagate the vrr active state to dirty bit so that on mode set it disables dynamic memory clock switching. Acked-by: Alan Liu <[email protected]> Signed-off-by: Harry VanZyllDeJong <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Firmware assisted MCLK switch and FSFelipe Clark2022-06-152-0/+9
| | | | | | | | | | | | | | | | | | | [WHY] Memory clock switching has great potential for power savings. [HOW] The driver code was modified to notify the DMCUB firmware that it should stretch the vertical blank of frames when a memory clock switch is about to start so that no blackouts happen on the screen due to unavailability of the frame buffer. The driver logic to determine when such firmware assisted strategy can be initiated is also implemented and consists on checking prerequisites of the feature. Acked-by: Alan Liu <[email protected]> Signed-off-by: Felipe Clark <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: update topology_update_input_v3 structQingqing Zhuo2022-06-152-0/+15
| | | | | | | | | | | | | | [Why] DIO parameters were missing in topology_update_intput_v3 struct. [How] Add DIO parameters in v3 struct and update in functions perspectively. Reviewed-by: Bhawanpreet Lakha <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Qingqing Zhuo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix monitor flash issueShah Dharati2022-06-151-1/+1
| | | | | | | | | | | | | | | | [Why & How] For a some specific monitors, when connected on boot or hot plug, monitor flash for 1/2 seconds can happen during first HDCP query operation. Ading some delay in the init sequence for these monitors fixes the issue, so it is implemented as monitor specific patch. Co-authored-by: Shah Dharati <[email protected]> Reviewed-by: Hansen Dsouza <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Shah Dharati <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: add shared helpers to update psr config fields to power moduleDavid Zhang2022-06-062-0/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [why] Currently the amdgpu DM psr configuration parameters are hardcoded before feeding into the DC helper to setup PSR. We would define a helper which is to calculate parts of the psr config fields to avoid hard-coding. [how] To make helper shareable, declare and define the helper in the module_helper, to set/update below fields: - psr remote buffer setup time - sdp tx line number deadline - line time in us - su_y_granularity - su_granularity_required - psr_frame_capture_indication_req - psr_exit_link_training_required add another helper to check given the stream context, if there is only one stream and the output is eDP panel connected. changes in v2: ------------------ - add detailed comment for how psr setup time is calculated as per eDP 1.5 spec Cc: Chandan Vurdigerenataraj <[email protected]> Signed-off-by: David Zhang <[email protected]> Acked-by: Leo Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: revise Start/End SDP dataDavid Zhang2022-06-061-2/+27
| | | | | | | | | | | | | | | | | | [why & how] We need to implement the VSC packet rev4 that is required by PSRSU. Follow the eDP 1.5 spec pg. 257 changes in v2: ------------------- - set vsc packet rev2 for PSR1 Cc: Chandan Vurdigerenataraj <[email protected]> Signed-off-by: David Zhang <[email protected]> Acked-by: Leo Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd: Fix spelling typo in commentspengfuyuan2022-06-031-1/+1
| | | | | | | | Fix spelling typo in comments. Reported-by: k2ci <[email protected]> Signed-off-by: pengfuyuan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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