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* drm/amd/display: correct some hdcp variable namingWenjing Liu2021-02-023-4/+4
| | | | | | | | | | | | | [why] In HDCP update stream config interface, some variables are named as xxx_supported, but in fact the variable indicates whether or not xxx_enabled. Correct the naming so it is less confusing to read the code. Signed-off-by: Wenjing Liu <[email protected]> Reviewed-by: George Shen <[email protected]> Acked-by: Anson Jacob <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: change license of color_table.cJonathan Gray2021-01-251-5/+21
| | | | | | | | Change the license of color_table.c to match color_table.h granting permission to modify and distribute. Signed-off-by: Jonathan Gray <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display/modules/info_packet/info_packet: Correct kernel-doc formattingLee Jones2021-01-141-9/+4
| | | | | | | | | | | | | | | | | Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/modules/info_packet/info_packet.c:412: warning: Cannot understand ***************************************************************************** Cc: Harry Wentland <[email protected]> Cc: Leo Li <[email protected]> Cc: Alex Deucher <[email protected]> Cc: "Christian König" <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Lee Jones <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display/modules/power/power_helpers: Staticify local functionsLee Jones2021-01-141-3/+3
| | | | | | | | | | | | | | | | | | | | Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/modules/power/power_helpers.c:281:6: warning: no previous prototype for ‘fill_iram_v_2’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/modules/power/power_helpers.c:455:6: warning: no previous prototype for ‘fill_iram_v_2_2’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/modules/power/power_helpers.c:601:6: warning: no previous prototype for ‘fill_iram_v_2_3’ [-Wmissing-prototypes] Cc: Harry Wentland <[email protected]> Cc: Leo Li <[email protected]> Cc: Alex Deucher <[email protected]> Cc: "Christian König" <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Rodrigo Siqueira <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Lee Jones <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: gradually ramp ABM intensityRizvi2020-12-232-10/+26
| | | | | | | | | | | | | [Why] Need driver to pass values of backlight ramp start and ramp reduction so that intensity can be ramped down appropriately. [How] Using abm_parameters structure to get these values from driver. Signed-off-by: Rizvi <[email protected]> Acked-by: Bindu Ramamurthy <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Modify the hdcp device count check conditionMartin Tsai2020-12-232-4/+11
| | | | | | | | | | | | | | | [why] Some MST display may not report the internal panel to DEVICE_COUNT, that makes the check condition always failed. [how] To update this condition with the reported device count + 1 (because the immediate repeater's internal panel is possibly not included in DEVICE_COUNT) Signed-off-by: Martin Tsai <[email protected]> Acked-by: Bindu Ramamurthy <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix OGAM LUT calculation precisionFelipe2020-12-151-5/+17
| | | | | | | | | | | | | | | | [Why] The OGAM LUT precision was accumulating too much error in the higher end. [How] Instead of calculating all points of the LUT in relation to the previous ones, perform a full calculation in one of the intermediate segments to stop error propagation. Signed-off-by: Felipe Clark <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Set FixRate bit in VSIF V3AMD\ramini2020-12-091-4/+8
| | | | | | | | | | | | | | | [Why] Signal FreeSync display that we are in Fixed Rate mode, and expand the FreeSync range to 1024. [How] Set the new bit in SB16:bit0, and augment the min and max refresh rate with 2 extra bits. Signed-off-by: AMD\ramini <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Eryk Brol <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Implement VSIF V3 extended refresh rate featureReza Amini2020-12-091-18/+82
| | | | | | | | | | | | | [Why] Implement feature of VSIF V3 [How] Set refresh rate MSB for extended range Signed-off-by: Reza Amini <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Eryk Brol <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)Alex Deucher2020-11-041-4/+4
| | | | | | | | | | Avoids confusion in configurations. v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabled v3: rebase on latest code Reviewed-by: Luben Tuikov <[email protected]> (v1) Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: set hdcp1 wa re-auth delay to 200msJake Wang2020-11-021-1/+1
| | | | | | | | | | | | | | [Why] Fail and restart timing for HDCP1 retry occurs too quickly. This would cause some MST monitors to show black screen. [How] Adjusted timing of fail and restart to 200ms. Signed-off-by: Jake Wang <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: fix build_coefficients() argumentArnd Bergmann2020-11-021-1/+1
| | | | | | | | | | | | | | | | | | gcc -Wextra warns about a function taking an enum argument being called with a bool: drivers/gpu/drm/amd/amdgpu/../display/modules/color/color_gamma.c: In function 'apply_degamma_for_user_regamma': drivers/gpu/drm/amd/amdgpu/../display/modules/color/color_gamma.c:1617:29: warning: implicit conversion from 'enum <anonymous>' to 'enum dc_transfer_func_predefined' [-Wenum-conversion] 1617 | build_coefficients(&coeff, true); It appears that a patch was added using the old calling conventions after the type was changed, and the value should actually be 0 (TRANSFER_FUNCTION_SRGB) here instead of 1 (true). Fixes: 55a01d4023ce ("drm/amd/display: Add user_regamma to color module") Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: remove unneeded semicolonTom Rix2020-10-301-1/+1
| | | | | | | A semicolon is not needed after a switch statement. Signed-off-by: Tom Rix <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: combined user regamma and OS GAMMA_CS_TFM_1DDerek Lai2020-10-262-4/+14
| | | | | | | | | | | | | | [Why] For user regamma we're missing this function call to combine user regamma + OS for GAMMA_CS_TFM_1D type. [How] Applied 1D LUT in the mod_color_build_user_regamma. And Set the regamma dirty as updateGamma. Signed-off-by: Derek Lai <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix max brightness pixel accuracyFelipe Clark2020-10-261-21/+89
| | | | | | | | | | | | | | | | | | | | [WHY] It was detected in some Freesync HDR tests that displays were not reaching their maximum nominal brightness. [HOW] The Multi-plane combiner (MPC) Output Gamma (OGAM) block builds a discrete Lookup Table (LUT). When the display's maximum brightness falls in between two values, having to be linearly interpolated by the hardware, rounding issues might occur that will cause the display to never reach its maximum brightness. The fix involves doing the calculations backwards, ensuring that the interpolation in the maximum brightness values translates to an output of 1.0. Signed-off-by: Felipe Clark <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: FreeSync not active near lower bound of non-LFC monitor rangeAric Cyr2020-10-051-4/+6
| | | | | | | | | | | | | | | [Why] On narrow range monitors without LFC, a margin prevents good utilization of the available range. [How] Decrease the margin for exiting fixed mode and fix the frame counter to reset if a non-consecutive render is found. Signed-off-by: Aric Cyr <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Eryk Brol <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fixed comments (uniform style)Felipe2020-10-051-22/+23
| | | | | | | | | | | | | | | | | | | [WHY] This change was implemented because the comment style was not uniform across the file. In some lines comments were initiated with // and in others they were in between /* ... */. Additionally, the style for multi-line comments was also not uniform and some comment lines were missing the space between the opening /* and the first word of the comment. [HOW] All comments are now in between /*.../*, multi line comments also use /*...*/ and for every comment there is now a space between the opening /* and the first word of the comment. Signed-off-by: Felipe <[email protected]> Acked-by: Eryk Brol <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Don't log hdcp module warnings in dmesgBhawanpreet Lakha2020-09-171-1/+1
| | | | | | | | | | | | | | | | [Why] DTM topology updates happens by default now. This results in DTM warnings when hdcp is not even being enabled. This spams the dmesg and doesn't effect normal display functionality so it is better to log it using DRM_DEBUG_KMS() [How] Change the DRM_WARN() to DRM_DEBUG_KMS() Signed-off-by: Bhawanpreet Lakha <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Don't use DRM_ERROR() for DTM add topologyBhawanpreet Lakha2020-09-151-1/+1
| | | | | | | | | | | | | | | | | [Why] Previously we were only calling add_topology when hdcp was being enabled. Now we call add_topology by default so the ERROR messages are printed if the firmware is not loaded. This error message is not relevant for normal display functionality so no need to print a ERROR message. [How] Change DRM_ERROR to DRM_INFO Signed-off-by: Bhawanpreet Lakha <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix CP_IRQ clear bit and logicHarmanprit Tatla2020-09-152-11/+8
| | | | | | | | | | | | | [Why] Currently clearing the wrong bit for CP_IRQ, and logic on when to clear needs to be fixed. [How] Corrected bit to clear and improved logic for decision to clear. Signed-off-by: Harmanprit Tatla <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add CP_IRQ clear capabilityHarmanprit Tatla2020-09-153-0/+29
| | | | | | | | | | | | [Why] Currently we do not clear the CP_IRQ bit upon receiving it. [How] Added a function to clear CP_IRQ bit. Signed-off-by: Harmanprit Tatla <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Send H14b-VSIF specified in HDMIWayne Lin2020-08-262-15/+3
| | | | | | | | | | | | | | | | | [Why] Current function excludes the logic to generate H14b-VSIF. Now it constructs HF-VSIF only and causes HDMI compliace test fail. [How] According to HDMI spec, source devices shall utilize the H14b-VSIF whenever the signaling capabilities of the H14b-VSIF allow this. Here keep the logic for HF-VSIF and add H14b-VSIF construction part. Signed-off-by: Wayne Lin <[email protected]> Reviewed-by: Roman Li <[email protected]> Acked-by: Eryk Brol <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Change ABM config init interfaceYongqiang Sun2020-08-172-5/+18
| | | | | | | | | | [Why & How] change abm config init interface to support multiple ABMs. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Chris Park <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix LFC multiplier changing erraticallyAnthony Koo2020-08-101-7/+29
| | | | | | | | | | | | | | | | | | | | [Why] 1. There is a calculation that is using frame_time_in_us instead of last_render_time_in_us to calculate whether choosing an LFC multiplier would cause the inserted frame duration to be outside of range. 2. We do not handle unsigned integer subtraction correctly and it underflows to a really large value, which causes some logic errors. [How] 1. Fix logic to calculate 'within range' using last_render_time_in_us 2. Split out delta_from_mid_point_delta_in_us calculation to ensure we don't underflow and wrap around Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Allow asic specific FSFT timing optimizationReza Amini2020-07-301-1/+4
| | | | | | | | | | | | | [Why] Each asic can optimize best based on its capabilities [How] Optimizing timing for a new pixel clock Signed-off-by: Reza Amini <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Eryk Brol <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Implement AMD VSIF V3Reza Amini2020-07-211-0/+41
| | | | | | | | | | | | | [Why] To support V3 [How] Generate new VSIF for V3 Signed-off-by: Reza Amini <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Send VSIF on unsupported modes on DALJaehyun Chung2020-07-081-1/+1
| | | | | | | | | | | | | | | | [Why] Current DAL behaviour is to not send VSIF if mode does not support VRR (ie. FS range is < 10Hz). However, we should still set FS Native Color Active bit in some unsupported mode cases. [How] Remove check for if VRR is supported before building infopacket. Signed-off-by: Jaehyun Chung <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Eryk Brol <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix incorrect rounding for 10Hz refresh rangeJaehyun Chung2020-07-022-32/+10
| | | | | | | | | | | | | | | | [Why] In cases where refresh range is slightly below 10, FreeSync is not active or supported. Need to round values before checking refresh range in order to have FreeSync supported in these cases. [How] Remove redundant values and round values before checking valid refresh range. Signed-off-by: Jaehyun Chung <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Anthony Koo <[email protected]> Acked-by: Eryk Brol <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: fix compilation error on allmodconfigQingqing Zhuo2020-07-011-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | when compiled with allmodconfig option, there are error messages as below: ERROR: modpost: "mod_color_is_table_init" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "mod_color_get_table" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "mod_color_set_table_init_state" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! To fix the issue, this commits removes CONFIG_DRM_AMD_DC_DCN guard in color/makefile. Signed-off-by: Qingqing Zhuo <[email protected]> CC: Lewis Huang <[email protected]> CC: Aric Cyr <[email protected]> CC: Alexander Deucher <[email protected]> CC: Harry Wentland <[email protected]> CC: Nicholas Kazlauskas <[email protected]> CC: Bhawanpreet Lakha <[email protected]> CC: Stephen Rothwell <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd: add missing fill of the array`s first elementBernard Zhao2020-07-011-0/+1
| | | | | | | | | In function fill_iram_v_2, the ram_table->bright_neg_gain`s first element [0][0] seems to be missing. This change is just to make the code a bit readable. Signed-off-by: Bernard Zhao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: change global buffer to local bufferLewis Huang2020-07-015-57/+175
| | | | | | | | | | | | | | | [Why] Multi-adapter calculate regamma table at the same time. Two thread used the same global variable cause race condition. [How] Change global buffer to local buffer Signed-off-by: Lewis Huang <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Use kfree() to free rgb_user in calculate_user_regamma_ramp()Denis Efremov2020-07-011-1/+1
| | | | | | | | | Use kfree() instead of kvfree() to free rgb_user in calculate_user_regamma_ramp() because the memory is allocated with kcalloc(). Signed-off-by: Denis Efremov <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Use kvfree() to free coeff in build_regamma()Denis Efremov2020-07-011-1/+1
| | | | | | | | | | Use kvfree() instead of kfree() to free coeff in build_regamma() because the memory is allocated with kvzalloc(). Fixes: e752058b8671 ("drm/amd/display: Optimize gamma calculations") Cc: [email protected] Signed-off-by: Denis Efremov <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: combine public interfaces into single headerAnthony Koo2020-05-281-1/+1
| | | | | | | | | | | | | | [Why] We want to better encapsulate all driver-fw dependencies into a single file. [How] Combine all the headers under inc folder into a single header Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix ABM memory alignment issueWyatt Wood2020-05-281-3/+42
| | | | | | | | | | | | | | | | | | | [Why] Due to packing of abm_config_table, memory addresses aren't aligned to 32 bit boundary dmcub prefers. Therefore when using pointers to this structure, it's possible that dmcub will automatically align the data read from that address, yielding incorrect values. [How] Instead of packing 1 byte boundary, explicitly pack values to 4 byte boundary. Since there is a dependency on the existing iram table structure on driver side, we must copy to a second structure, which is aligned correctly, before passing to fw. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add bit swap helper based on endiannessRodrigo Siqueira2020-05-281-24/+26
| | | | | | | | | | | | Christian Koenig pointed out a code duplication related to bit swap in case of big-endian manipulation. This commit adds a helper for handling this verification and reduces the requirement of replicate some part of the code. Signed-off-by: Rodrigo Siqueira <[email protected]> Reviewed-by: Wyatt Wood <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Handle persistence in DMJaehyun Chung2020-05-281-1/+7
| | | | | | | | | | | | | | | [Why] Remove dm_write_persistent_data and dm_read_persistent_data as persistence should be handled in DM. [How] Remove functions. Move read/write calls into DM layer while maintaining logic. Signed-off-by: Jaehyun Chung <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: correct rn NUM_VMIDDmytro Laktyushkin2020-05-211-2/+5
| | | | | | | | | | Save the correct num vmid during resource creation and fix RN gpuvm level from 1 to 16 vmid entries. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Eric Bernstein <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: move location of dmub_srv.h fileAnthony Koo2020-05-051-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | [Why] Make a separation of what belongs in the differen dmub headers dmub_srv.h is for exposing dmub srv interface to rest of driver. other headers inside dmub/inc exposes cmds and definitions that are owned by the firmware [How] keep firmware owned definitions in dmub/inc move stuff that is purely driver interface headers to dmub/ since those are interface calls that are defined for rest of driver to use Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Harry Wentland <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: remove unused module/statsAurabindo Pillai2020-05-051-448/+0
| | | | | Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: add addition dc type to translate to dmub fw typeAnthony Koo2020-05-051-1/+1
| | | | | | | | | | | | | | | | | | | | | [Why] For a type like PSR version, it makes sense for most of the code to include a dc type, instead of having this a fw type define since this is a capability and type exposed by dc. Especially if it doesn't even need to communicate with the fw. The code that is packing the firmware command message should be the one who needs to translate the psr version into a command that the firmware understands. [How] Add a dc_psr_version enum. Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Internal refactoring to abstract color capsKrunoslav Kovac2020-04-282-7/+28
| | | | | | | | | | | | | | | | | [Why&How] modules/color calculates various colour operations which are translated to abstracted HW. DCE 5-12 had almost no important changes, but starting with DCN1, every new generation comes with fairly major differences in color pipeline. We would hack it with some DCN checks, but a better approach is to abstract color pipe capabilities so modules/DM can decide mapping to HW block based on logical capabilities, Signed-off-by: Krunoslav Kovac <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Anthony Koo <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Convert memory from cpu to fw endianness correctlyWyatt Wood2020-04-221-27/+31
| | | | | | | | | | | | | | | | | [Why] Current code does not guarantee the correct endianness of memory being copied to fw, specifically in the case where cpu isn't little endian. [How] Windows and Diags are always little endian, so we define a macro that does nothing. Linux already defines this macro and will do the correct endianness conversion. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Change infopacket type programmingHaiyi Zhou2020-04-223-10/+99
| | | | | | | | | | | | | | | | [Why] Certain displays may experience blanking if infopacket max range does not equal nominal refresh rate. [How] Add additional infopacket versions to program range to full or forced range in freesync states. This does not change the vrr logic. Signed-off-by: Haiyi Zhou <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Check ramp != NULL before applying lut1d for degammaNicholas Kazlauskas2020-04-221-1/+1
| | | | | | | | | | | | | | | | | | [Why] A NULL ramp is a valid configuration for passing into mod_color_calculate_degamma_params but we'll hit a NULL pointer if we do so. We need this in order to get the right transfer function to do degamma on NV12 formats where we aren't supplied with a custom user degamma. [How] Add the NULL check. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Zhan Liu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Unify psr feature flagsWyatt Wood2020-04-221-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] As it stands, psr has feature flags in dm, stream, and link. Most are not defined well enough, and different dm layers have different uses for these same flags. [How] We define a new structure called psr_settings in dc_link that will hold the following psr feature flags: psr_feature_enable - psr is supported psr_allow_active - psr is currently active psr_version - internal psr version supported psr_frame_capture_indication_req psr_sdp_transmit_line_num_deadline The last two flags were moved out of the power module for the purposes of consolidating psr flags. Their use is already well-defined. Psr caps reported by sink will also be stored in dc_link, in dpcd_caps.psr_caps. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Remove byte swapping for dmcub abm config tableWyatt Wood2020-04-221-38/+36
| | | | | | | | | | | | | | | [Why] Since x86 and dmcub are both little endian, byte swapping isn't necessary. Dmcu requires byte swapping as it is big endian. [How] Add flag to function definitions to determine if byte swapping is necessary. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix ABM config copy for dmcubWyatt Wood2020-04-092-10/+23
| | | | | | | | | Decouple dmcub config copy from dmcu iram copy. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: fix typoJoseph Gravenor2020-04-093-8/+8
| | | | | | | | | | | | | | | | | | [why] MOD_HDCP_STATUS_HDCP1_ENABLE_ENCRYPTION and MOD_HDCP_STATUS_HDCP2_ENABLE_ENCRYPTION were supposed to be MOD_HDCP_STATUS_HDCP1_ENABLE_ENCRYPTION_FAILURE and MOD_HDCP_STATUS_HDCP2_ENABLE_ENCRYPTION_FAILURE. Because of this it always seems like mod_hdcp_hdcp1_enable_encryption and mod_hdcp_hdcp2_enable_encryption are always passing [how] rename the elements to what they were supposed to be called Signed-off-by: Joseph Gravenor <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Remove hdcp display state with mst fixIsabel Zhang2020-04-096-47/+26
| | | | | | | | | | | | | | | | | | [Why] Due to previous code changes, displays transition from active to active and added state immediately, making it redundant to have both display states. Previous change to fix this caused HDCP to get into a bad state when monitor is connected to MST hub, this change fixes that issue. [How] Change code behavior so when a device is added successfully the state remains as active and when addition is unsuccessful change state to inactive. This removes need for added and active state. Signed-off-by: Isabel Zhang <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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