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* drm/amd/display: Fix RV2 Variant DetectionMichael Strauss2020-02-251-6/+6
| | | | | | | | | | | | | | | | | [WHY] RV2 and variants are indistinguishable by hw internal rev alone, need to be distinguishable in order to correctly set max vlevel. Previous detection change incorrectly checked for hw internal rev. [HOW] Use pci revision to check if RV2 or low power variant Correct a few overlapping ASICREV range checks Signed-off-by: Michael Strauss <[email protected]> Reviewed-by: Michael Strauss <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add AUX backlight registerRodrigo Siqueira2020-02-111-0/+8
| | | | | | | | | | Introduce vendor-specific registers for handling backlight via AUX. Signed-off-by: Rodrigo Siqueira <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Harry Wentland <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: add Pollock IDs, fix Pollock & Dali clk mgr constructMichael Strauss2020-01-141-0/+10
| | | | | | | | | | | | | | | | | | [WHY] Only a single voltage level should be available to Pollock (min level) Pollock & Dali get misidentified as Renoir, use wrong clk mgr constructor [HOW] Add provided Pollock IDs to ASIC Rev. ID list. Create new Pollock ASIC RID check, fix RV2 & Dali ASIC checks. Check RID and set max voltage level to 0 if Pollock is detected. Work around broken ASICREV_IS_RENOIR, IS_RAVEN2, etc. checks by performing Dali/Pollock checks before they can be misidentified as RN. Signed-off-by: Michael Strauss <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add warmup escape call supportCharlene Liu2019-12-181-1/+5
| | | | | | | | | | | Add warmup escape support, for diags, in a way that is possible to choose a new or an existing sequence. For achieving this goal, this commit adds separated MCIF buffer as VCN request. Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Chris Park <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: fixed that I2C over AUX didn't read data issueBrandon Syu2019-12-051-1/+1
| | | | | | | | | | | | | [Why] The variable mismatch assignment error. [How] To use uint32_t replace it. Signed-off-by: Brandon Syu <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix Dali clk mgr constructMichael Strauss2019-12-051-7/+5
| | | | | | | | | | | | | | [WHY] Dali is currently being misinterpreted as Renoir, as a result uses wrong clk mgr constructor [HOW] Add check to init Dali as Raven2 before it can be misidentified Clean up & fix Raven2 & Dali ASIC checks Signed-off-by: Michael Strauss <[email protected]> Reviewed-by: Eric Yang <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: add color space option when sending link test patternWenjing Liu2019-11-191-0/+7
| | | | | | | | | | | | | | | | | [why] In the TEST_MSIC dpcd register field definition, the test equipment has the option to choose between YCbCr601 or YCbCr709. We will apply corresponding YCbCr coefficient based on this test request. [how] Add a new input parameter in dc_link_dp_set_test_pattern to allow the selection between different color space. Signed-off-by: Wenjing Liu <[email protected]> Reviewed-by: Nikola Cornij <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_1 flagBhawanpreet Lakha2019-11-132-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] DCN21 is stable enough to be build by default. So drop the flags. [How] Remove them using the unifdef tool. The following commands were executed in sequence: $ find -name '*.c' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DCN2_1 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_1 '{}' ';' $ find -name '*.h' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DCN2_1 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_1 '{}' ';' In addition: * Remove from kconfig, and replace any dependencies with DCN1_0. * Remove from any makefiles. * Fix and cleanup Renoir definitions in dal_asic_id.h * Expand DCN1 ifdef to include DCN21 code in the following files: * clk_mgr/clk_mgr.c: dc_clk_mgr_create() * core/dc_resources.c: dc_create_resource_pool() * gpio/hw_factory.c: dal_hw_factory_init() * gpio/hw_translate.c: dal_hw_translate_init() Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTEDBhawanpreet Lakha2019-11-133-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] DCN2 and DSC are stable enough to be build by default. So drop the flags. [How] Remove them using the unifdef tool. The following commands were executed in sequence: $ find -name '*.c' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DSC_SUPPORT -DCONFIG_DRM_AMD_DC_DCN2_0 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_0 '{}' ';' $ find -name '*.h' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DSC_SUPPORT -DCONFIG_DRM_AMD_DC_DCN2_0 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_0 '{}' ';' In addition: * Remove from kconfig, and replace any dependencies with DCN1_0. * Remove from any makefiles. * Fix and cleanup NV defninitions in dal_asic_id.h * Expand DCN1 ifdef to include DCN2 code in the following files: * clk_mgr/clk_mgr.c: dc_clk_mgr_create() * core/dc_resources.c: dc_create_resource_pool() * dce/dce_dmcu.c: dcn20_*lock_phy() * dce/dce_dmcu.c: dcn20_funcs * dce/dce_dmcu.c: dcn20_dmcu_create() * gpio/hw_factory.c: dal_hw_factory_init() * gpio/hw_translate.c: dal_hw_translate_init() Signed-off-by: Leo Li <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: add oem i2c implemenation in dcJun Lei2019-11-131-1/+2
| | | | | | | | | | | | | | [why] Need it for some OEM I2C devices in Nv10 [how] Link up code to parse OEM table and expose DC interface to access the pins Signed-off-by: Jun Lei <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: add new active dongle to existent w/aVitaly Prosyak2019-10-111-0/+2
| | | | | | | | | | | | | | [Why & How] Dongle 0x00E04C power down all internal circuits including AUX communication preventing reading DPCD table. Encoder will skip DP RX power down on disable output to keep receiver powered all the time. Signed-off-by: Vitaly Prosyak <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add HDCP moduleBhawanpreet Lakha2019-10-031-0/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This module manages HDCP for amdgpu driver. The module behaves as a state machine which handles the different authentication states of HDCP The module is divided into 3 major components +--------+ | Hdcp.c | +--------+ Manages the state machine, sends the events to be executed and communicates with the dm +-----------+ |Execution.c| +-----------+ This executes events based on the current state. Also generates execution results as transition inputs +------------+ |Transition.c| +------------+ Decides the next state based on the input and makes requests to hdcp.c to handle. +-------------+ ------> | Execution.c | ------ | +-------------+ | | V +----+ +--------+ +--------------+ | DM | -----> | Hdcp.c | <------------ | Transition.c | +----+ <----- +--------+ +--------------+ v2: Drop unused function definitions Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: add Asic ID for DaliBhawanpreet Lakha2019-09-161-2/+5
| | | | | | | | | | | Dali is a new asic revision based on raven2 Add the ID and ASICREV_IS_DALI define Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: add dal_asic_id for renoirBhawanpreet Lakha2019-08-291-0/+5
| | | | | | | | Add the rev id for renoir. Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Handle Renoir in DCBhawanpreet Lakha2019-08-291-0/+3
| | | | | | | | add Renoir DCN version in DC and handle it Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: refactor Device ID for external chipsQingqing Zhuo2019-08-231-4/+6
| | | | | | | | | | IEEE OUI will now be used while referring to certain vendors. instead of normal index Signed-off-by: Qingqing Zhuo <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add Logging for Gamma Related information (2/2)Wyatt Wood2019-08-151-0/+6
| | | | | | | | | | | | | | [Why] A recent bug showed that logging would be useful in debugging various gamma issues. [How] Add logging in dc. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add Logging for Gamma Related information (1/2)Wyatt Wood2019-08-152-0/+3
| | | | | | | | | | | | | | [Why] A recent bug showed that logging would be useful in debugging various gamma issues. [How] Add new log types and logging code to the color module. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: refactor gpio to allocate hw_container in constructorSu Sung Chung2019-08-151-0/+9
| | | | | | | | | | | | | | | [why] if dynamic allocation fails during gpio_open, it will cause crash due to page fault. [how] handle allocation when gpio object gets created and prevent from calling gpio_open if allocation failed Signed-off-by: Su Sung Chung <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add ASICREV_IS_NAVI macrosLeo Li2019-08-021-1/+3
| | | | | | | | They are used by DC to determine ASIC revs. Signed-off-by: Leo Li <[email protected]> Reviewed-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: handle active dongle port type is DP++ or DP caseDale Zhao2019-07-181-1/+1
| | | | | | | | | | | | | | | | | [Why]: Some active dongles have DP++ port and DP port at the same time. Current code doesn't cover DP++ case and processes as default DVI case, in which audio is disabled. Because of dual mode, DP case is also treat as DVI case for the other port. [How]: According DP 1.4 spec, add DP++ procedure similar with HDMI case. Also add None dongle type for DP case. Signed-off-by: Dale Zhao <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Hook up calls to do stereo mux and dig programming to ↵Murton Liu2019-07-181-1/+17
| | | | | | | | | | | | | | | | | stereo control interface [Why] Implementation of stereo mux register is complete, but unused. Need to call functions to write relevant configs. [How] Add function to write stereo config for enable/disable case and call in stereo control interface. Signed-off-by: Murton Liu <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display:Use Pixel clock in 100Hz units for HDMI Audio wall clock DTONevenko Stupar2019-07-181-2/+2
| | | | | | | | | | | | | | | [Why] -Pass and use pixel clock in 100 Hz to Audio for HDMI audio DTO for Audio wall clock programming so audio DTO gets increased precision for timings with /1001 factor. -For HDMI TMDS for N and CTS ACR tables are based on 10 KHz units, these does not need to be modified as N and CTS values are still valid using current tables. Signed-off-by: Nevenko Stupar <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add ability to set preferred link training parameters.David Galiffi2019-07-181-7/+10
| | | | | | | | | | | | | | | | | [WHY] To add support for OS requirement to set preferred link training parameters. [HOW] Create new structure of dp link training overrides. During link training processes, these values should be used instead of the default training parameters. Signed-off-by: David Galiffi <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Anthony Koo <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: add ASICREV defines v2Bhawanpreet Lakha2019-07-181-0/+8
| | | | | | | | Add revs for navi10 and 14. Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Xiaojie Yuan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: update DSC MST DP virtual DPCD peer device enumeration policyWenjing Liu2019-06-221-168/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | [why] Current policy assumes virtual DPCD peer device as an individual MST branch device with 1 input and 1 output. However this is only true for virtual DP-to-DP peer device. In general there are three types of virtual DP peer devices. 1. Sink peer device with virtual DPCD. 2. Virtual DP-to-DP Peer device with virtual DPCD. 3. Virtual DP-to-HDMI Protocol Converter Peer Device with Virtual DPCD. So we should break the assumption and handle all three types. [how] DP-to-DP peer device will have virtual DPCD cap upstream. Sink peer device will have virtual DPCD on the logical port. Dp to HDMI protocol converter peer device will have virtual DPCD on its converter port. For DSC capable Synaptics non VGA port we workaround by enumerating a virutal DPCD peer device on its upstream even if it doesn't have one. Signed-off-by: Wenjing Liu <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: add dsc_passthrough_support bit in dpcd structWenjing Liu2019-06-221-3/+3
| | | | | | | | Signed-off-by: Wenjing Liu <[email protected]> Reviewed-by: Nikola Cornij <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: [backport] dwb dm + efc supportCharlene Liu2019-06-221-0/+1
| | | | | | | | | dwb fixes. Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Duke Du <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Create DWB resource for DCN2Charlene Liu2019-06-221-0/+3
| | | | | | | | | | | [Description] dcn20 has num_dwb =1 in the res cap, but not created. Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Duke Du <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add support for extended DSC DPCD capsNikola Cornij2019-06-221-0/+168
| | | | | | | | | | | | [why] A few of the new DSC DPCD caps were introduced by a DP 1.4a SCR in order to give DSC branch decoders a chance to expose their maximum throughput and maximum line width limitations. Signed-off-by: Nikola Cornij <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add DSC support for Navi (v2)Harry Wentland2019-06-221-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for DCN2 DSC (Display Stream Compression) HW Blocks: +--------++------+ +----------+ | HUBBUB || HUBP | <-- | MMHUBBUB | +--------++------+ +----------+ | ^ v | +--------+ +--------+ | DPP | | DWB | +--------+ +--------+ | v ^ +--------+ | | MPC | | +--------+ | | | v | +-------+ +-------+ | | OPP | <--> | DSC | | +-------+ +-------+ | | | v | +--------+ / | OPTC | -------------- +--------+ | v +--------+ +--------+ | DIO | | DCCG | +--------+ +--------+ v2: rebase (Alex) Signed-off-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add DCN2 and NV ASIC IDHarry Wentland2019-06-212-0/+9
| | | | | | | DCN2.0 (Display Core Next) is the display block in Navi10. Signed-off-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: make clk mgr soc specificEric Yang2019-05-311-5/+6
| | | | | | | | | | | | | | | | | | [Why] First step of refactoring clk mgr to better handle different ways of handling clock operations. Clock operation policies are soc specific and not just DCN vesion specific. It is not a hw resource, should not be in the resource pool. [How] Change clock manager creation to be based on HW internal ID, rename clock manager members to be more clear. Move clock manager out of resource. Signed-off-by: Eric Yang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Drop DCN1_01 guardsHarry Wentland2019-05-242-6/+0
| | | | | | | | | [WHY] These were only needed for bringup. They're not needed anymore. Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add ASICREV_IS_PICASSOHarry Wentland2019-05-241-3/+4
| | | | | | | | | | [WHY] We only want to load DMCU FW on Picasso and Raven 2, not on Raven 1. Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
* drm/amd/display: Define Byte 14 on AVI InfoFrameChris Park2019-05-241-1/+4
| | | | | | | | | | | | | | [Why] Part of HDMI 2.1 requires AVI InfoFrame version update from current V2 to V4 for new colorimetry. [How] Define V4 AVI InfoFrame ACE0-ACE3 bit. Signed-off-by: Chris Park <[email protected]> Reviewed-by: Nevenko Stupar <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: block passive dongle EDID Emulation for USB-C portsSamson Tam2019-05-241-1/+2
| | | | | | | | | | | | | | | [Why] Emulating passive dongle on USB-C port causes issue on some asics. [How] Check for DP_IS_USB_C flag in bios parser and propagate it to encoder features flags. If DP_IS_USB_C flag is set and it is trying to emulate passive dongle, then return fail. Signed-off-by: Samson Tam <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Set dispclk and dprefclock directlyEric Yang2019-05-241-1/+2
| | | | | | | | | | | | | | | [Why] To simply logic for setting DCN specific clocks, we will send SMU message directly through the VBIOS message box. [How] Add new structure in pp_smu to hold functions to set clocks through vbios message box Signed-off-by: Eric Yang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Rename is_hdmi to is_hdmi_tmds typeEric Bernstein2019-03-191-0/+5
| | | | | | | | | | HDMI has TMDS and FRL signal types. Be specific about what is used. Signed-off-by: Eric Bernstein <[email protected]> Reviewed-by: Nevenko Stupar <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add function to create 4d19 fixed pointTyler DiBattista2019-03-191-0/+2
| | | | | | | | | | [Why] Implemented for future use Signed-off-by: Tyler DiBattista <[email protected]> Reviewed-by: Eric Bernstein <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: remove screen flashes on seamless bootAnthony Koo2019-02-191-0/+3
| | | | | | | | | | | | | | [Why] We want boot to desktop to be seamless [How] During init pipes, avoid touching the pipes where GOP has already enabled the HW to the state we want. Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: add gpio lock/unlockChiawen Huang2019-02-061-0/+8
| | | | | | | | | | | | | | | | | | [Why] When querying HPD via GPIO flow, it will create a new gpio object then free in the end of query. There is a irql issue for HPD querying at ISR level. [How] Therefore, creating the HPD gpio object in dc_link and set it as unlcok in default. 1. reducing unnecessary malloc/free when HPD querying. 2. reducing init GPIO flow. 3. add lock/unlock to prevent multi gpio service running. Signed-off-by: Chiawen Huang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Remove i2caux folderDavid Francis2019-01-141-23/+0
| | | | | | | | | | | | | | [Why] It is huge, unmaintainable, needlessly layered, and obsolete [How] Remove it. All of it. Also remove the i2caux struct in dc_context and the code that created and destructed it Signed-off-by: David Francis <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Shift dc link aux to aux_payloadDavid Francis2019-01-141-0/+10
| | | | | | | | | | | | | | | | | [Why] aux_payload should be the struct used inside dc to start aux transactions. This will allow the old aux interface to be seamlessly replaced. [How] Add three fields to aux_payload: reply, mot, defer_delay This will mean that aux_payload has all data required to submit a request. Shift dc_link to use this struct Signed-off-by: David Francis <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Use 100 Hz precision for pipe pixel clocksKen Chalmers2019-01-141-2/+2
| | | | | | | | | | | | | | | [Why] Users would like more accurate pixel clocks, especially for fractional "TV" frame rates like 59.94 Hz. [How] Store and communicate pixel clocks with 100 Hz accuracy from dc_crtc_timing through to BIOS command table setpixelclock call. Signed-off-by: Ken Chalmers <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add functionality to get XGMI SS infoLeo Li2018-12-181-0/+1
| | | | | | | | | | | | | | | | | | [Why] When XGMI is enabled, the DP reference clock needs to be adjusted according to the XGMI spread spectrum percentage and mode. But first, we need the ability to fetch this info. [How] Within the BIOS parser, Read from vBIOS when XGMI SS info is requested. In addition, diags build uses include_legacy/atomfirmware.h for the smu_info_v3_3 table headers. Update that as well. Signed-off-by: Leo Li <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Tony Cheng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add DCE_VERSION_12_1 enum for Vega 20Leo Li2018-12-181-0/+1
| | | | | | | | | | | | | [Why] We'll need a way to differentiate Vega 20 in DC [How] Add a DCE_VERSION_12_1 enum, which will be returned as the DC version if the ASIC used is a Vega 20. Signed-off-by: Leo Li <[email protected]> Reviewed-by: David Francis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add a check-function for virtual signal typeNikola Cornij2018-10-091-0/+5
| | | | | | | | | | | | [why] Same functions exist for all other signal types. [how] Add a function that checks against virtual signal type. Signed-off-by: Nikola Cornij <[email protected]> Reviewed-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add Raven2 definitions in dcBhawanpreet Lakha2018-09-142-0/+10
| | | | | | | | | | Add Raven2 definitions in the dc code Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected] Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Support reading hw state from debugfs fileNicholas Kazlauskas2018-08-272-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] Logging hardware state can be done by triggering a write to the debugfs file. It would also be useful to be able to read the hardware state from the debugfs file to be able to generate a clean log without timestamps. [How] Usage: cat /sys/kernel/debug/dri/0/amdgpu_dm_dtn_log Threading is an obvious concern when dealing with multiple debugfs operations and blocking on global state in dm or dc seems unfavorable. Adding an extra parameter for the debugfs log context state is the implementation done here. Existing code that made use of DTN_INFO and its associated macros needed to be refactored to support this. We don't know the size of the log in advance so it reallocates the log string dynamically. Once the log has been generated it's copied into the user supplied buffer for the debugfs. This allows for seeking support but it's worth nothing that unlike triggering output via dmesg the hardware state might change in-between reads if your buffer size is too small. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Jordan Lazare <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
generated by cgit (git 2.51.2) at 2025-12-03 17:46:21 +0000