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| | * drm/amdgpu/sdma5: re-emit unprocessed state on ring resetAlex Deucher2025-07-171-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | Re-emit the unprocessed state after resetting the queue. Reviewed-by: Jesse Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/gfx12: re-emit unprocessed state on ring resetAlex Deucher2025-07-171-31/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Re-emit the unprocessed state after resetting the queue. Drop the soft_recovery callbacks as the queue reset replaces it. Reviewed-by: Jesse Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/gfx11: re-emit unprocessed state on ring resetAlex Deucher2025-07-171-31/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Re-emit the unprocessed state after resetting the queue. Drop the soft_recovery callbacks as the queue reset replaces it. Reviewed-by: Jesse Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/gfx10: re-emit unprocessed state on ring resetAlex Deucher2025-07-171-31/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Re-emit the unprocessed state after resetting the queue. Drop the soft_recovery callbacks as the queue reset replaces it. Reviewed-by: Jesse Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/gfx9.4.3: re-emit unprocessed state on kcq resetAlex Deucher2025-07-171-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | Re-emit the unprocessed state after resetting the queue. Reviewed-by: Jesse Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/gfx9: re-emit unprocessed state on kcq resetAlex Deucher2025-07-171-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | Re-emit the unprocessed state after resetting the queue. Reviewed-by: Jesse Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu: Add WARN_ON to the resource clear functionArunpravin Paneer Selvam2025-07-171-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the dirty bit when the memory resource is not cleared during BO release. v2(Christian): - Drop the cleared flag set to false. - Improve the amdgpu_vram_mgr_set_clear_state() function. v3: - Add back the resource clear flag set function call after being cleared during eviction (Christian). - Modified the patch subject name. Signed-off-by: Arunpravin Paneer Selvam <[email protected]> Suggested-by: Christian König <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu: Replace HQD terminology with slots namingJesse Zhang2025-07-161-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The term "HQD" is CP-specific and doesn't accurately describe the queue resources for other IP blocks like SDMA, VCN, or VPE. This change: 1. Renames `num_hqds` to `num_slots` in amdgpu_kms.c to better reflect the generic nature of the resource counting 2. Updates the UAPI struct member from `userq_num_hqds` to `userq_num_slots` 3. Maintains the same functionality while using more appropriate terminology Signed-off-by: Jesse Zhang <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu: Add user queue instance count in HW IP infoJesse Zhang2025-07-161-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change exposes the number of available user queue instances for each hardware IP type (GFX, COMPUTE, SDMA) through the drm_amdgpu_info_hw_ip interface. Key changes: 1. Added userq_num_instance field to drm_amdgpu_info_hw_ip structure 2. Implemented counting of available HQD slots using: - mes.gfx_hqd_mask for GFX queues - mes.compute_hqd_mask for COMPUTE queues - mes.sdma_hqd_mask for SDMA queues 3. Only counts available instances when user queues are enabled (!disable_uq) v2: using the adev->mes.gfx_hqd_mask[]/compute_hqd_mask[]/sdma_hqd_mask[] masks to determine the number of queue slots available for each engine type (Alex) v3: rename userq_num_instance to userq_num_hqds (Alex) Suggested-by: Alex Deucher <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Jesse Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amd/amdgpu: Add helper functions for isp buffersPratap Nirujogi2025-07-163-10/+176
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Accessing amdgpu internal data structures "struct amdgpu_device" and "struct amdgpu_bo" in ISP V4L2 driver to alloc/free GART buffers is not recommended. Add new amdgpu_isp helper functions that takes opaque params from ISP V4L2 driver and calls the amdgpu internal functions amdgpu_bo_create_isp_user() and amdgpu_bo_create_kernel() to alloc/free GART buffers. Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Pratap Nirujogi <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amd/amdgpu: Initialize swnode for ISP MFD devicePratap Nirujogi2025-07-163-6/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create amd_isp_capture MFD device with swnode initialized to isp specific software_node part of fwnode graph in amd_isp4 x86/platform driver. The isp driver use this swnode handle to retrieve the critical properties (data-lanes, mipi phyid, link-frequencies etc.) required for camera to work on AMD ISP4 based targets. Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Pratap Nirujogi <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/gfx8: reset compute ring wptr on the GPU on resumeEeli Haapalainen2025-07-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 42cdf6f687da ("drm/amdgpu/gfx8: always restore kcq MQDs") made the ring pointer always to be reset on resume from suspend. This caused compute rings to fail since the reset was done without also resetting it for the firmware. Reset wptr on the GPU to avoid a disconnect between the driver and firmware wptr. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3911 Fixes: 42cdf6f687da ("drm/amdgpu/gfx8: always restore kcq MQDs") Signed-off-by: Eeli Haapalainen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/jpeg: clean up reset type handlingAlex Deucher2025-07-168-26/+29
| | | | | | | | | | | | | | | | | | | | | | | | Make the handling consistent with other IPs and across JPEG versions. Reviewed-by: Sathishkumar S <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu: rework gmc_v9_0_get_coherence_flags v2Christian König2025-07-161-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoid using the mapping here. v2: use amdgpu_xgmi_same_hive() as suggested by Felix Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/vcn3: implement ring resetAlex Deucher2025-07-161-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | Use the new helpers to handle engine resets for VCN. Reviewed-by: Sathishkumar S <[email protected]> Tested-by: Sathishkumar S <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/vcn2.5: implement ring resetAlex Deucher2025-07-161-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | Use the new helpers to handle engine resets for VCN. Reviewed-by: Sathishkumar S <[email protected]> Tested-by: Sathishkumar S <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/vcn2: implement ring resetAlex Deucher2025-07-161-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | Use the new helpers to handle engine resets for VCN. Reviewed-by: Sathishkumar S <[email protected]> Tested-by: Sathishkumar S <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/vcn: add a helper framework for engine resetsAlex Deucher2025-07-162-1/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With engine resets we reset all queues on the engine rather than just a single queue. Add a framework to handle this similar to SDMA. Reviewed-by: Sathishkumar S <[email protected]> Tested-by: Sathishkumar S <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/vcn5: re-emit unprocessed state on ring resetAlex Deucher2025-07-161-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | Re-emit the unprocessed state after resetting the queue. Reviewed-by: Sathishkumar S <[email protected]> Tested-by: Sathishkumar S <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/vcn4.0.5: re-emit unprocessed state on ring resetAlex Deucher2025-07-161-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | Re-emit the unprocessed state after resetting the queue. Reviewed-by: Sathishkumar S <[email protected]> Tested-by: Sathishkumar S <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/vcn4.0.3: re-emit unprocessed state on ring resetAlex Deucher2025-07-161-7/+3
| | | | | | | | | | | | | | | | | | | | | Re-emit the unprocessed state after resetting the queue. Reviewed-by: Sathishkumar S <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/vcn4: re-emit unprocessed state on ring resetAlex Deucher2025-07-161-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | Re-emit the unprocessed state after resetting the queue. Reviewed-by: Sathishkumar S <[email protected]> Tested-by: Sathishkumar S <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/jpeg5.0.1: re-emit unprocessed state on ring resetAlex Deucher2025-07-161-9/+2
| | | | | | | | | | | | | | | | | | | | | Re-emit the unprocessed state after resetting the queue. Reviewed-by: Sathishkumar S <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/jpeg5: add queue resetAlex Deucher2025-07-161-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add queue reset support for jpeg 5.0.0. Use the new helpers to re-emit the unprocessed state after resetting the queue. Reviewed-by: Sathishkumar S <[email protected]> Tested-by: Sathishkumar S <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/jpeg4.0.5: add queue resetAlex Deucher2025-07-161-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add queue reset support for jpeg 4.0.5. Use the new helpers to re-emit the unprocessed state after resetting the queue. Reviewed-by: Sathishkumar S <[email protected]> Tested-by: Sathishkumar S <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/jpeg4.0.3: re-emit unprocessed state on ring resetAlex Deucher2025-07-161-9/+2
| | | | | | | | | | | | | | | | | | | | | Re-emit the unprocessed state after resetting the queue. Reviewed-by: Sathishkumar S <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/jpeg4: re-emit unprocessed state on ring resetAlex Deucher2025-07-161-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | Re-emit the unprocessed state after resetting the queue. Reviewed-by: Sathishkumar S <[email protected]> Tested-by: Sathishkumar S <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/jpeg3: re-emit unprocessed state on ring resetAlex Deucher2025-07-161-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | Re-emit the unprocessed state after resetting the queue. Reviewed-by: Sathishkumar S <[email protected]> Tested-by: Sathishkumar S <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/jpeg2.5: re-emit unprocessed state on ring resetAlex Deucher2025-07-161-9/+2
| | | | | | | | | | | | | | | | | | | | | | | | Re-emit the unprocessed state after resetting the queue. Reviewed-by: Sathishkumar S <[email protected]> Tested-by: Sathishkumar S <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/jpeg2: re-emit unprocessed state on ring resetAlex Deucher2025-07-161-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | Re-emit the unprocessed state after resetting the queue. Reviewed-by: Sathishkumar S <[email protected]> Tested-by: Sathishkumar S <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu: Increase reset counter only on successLijo Lazar2025-07-161-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Increment the reset counter only if soft recovery succeeded. This is consistent with a ring hard reset behaviour where counter gets incremented only if hard reset succeeded. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu: make compute timeouts consistentAlex Deucher2025-07-162-15/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For kernel compute queues, align the timeout with other kernel queues (10 sec). This had previously been set higher for OpenCL when it used kernel queues, but now OpenCL uses KFD user queues which don't have a timeout limitation. This also aligns with SR-IOV which already used a shorter timeout. Additionally the longer timeout negatively impacts the user experience with kernel queues for interactive applications. Reviewed-by: Kent Russell <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu: Check SQ_CONFIG register support on SRIOVTony Yi2025-07-163-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | On SRIOV environments, check if RLCG supports SQ_CONFIG register programming. Signed-off-by: Tony Yi <[email protected]> Reviewed-by: Zhigang Luo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu: track ring state associated with a fenceAlex Deucher2025-07-166-3/+195
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to know the wptr and sequence number associated with a fence so that we can re-emit the unprocessed state after a ring reset. Pre-allocate storage space for the ring buffer contents and add helpers to save off and re-emit the unprocessed state so that it can be re-emitted after the queue is reset. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu: clean up GC reset functionsAlex Deucher2025-07-165-26/+45
| | | | | | | | | | | | | | | | | | | | | Make them consistent and use the reset flags. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu: clean up jpeg reset functionsAlex Deucher2025-07-164-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | Make them consistent and use the reset flags. Reviewed-by: Sathishkumar S <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/vcn: don't enable per queue resets on SR-IOVAlex Deucher2025-07-163-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | Power control is only available in bare metal. SR-IOV will need a different method. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/jpeg4: add additional ring reset error checkingAlex Deucher2025-07-161-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Start and stop can fail, so add checks. Fixes: 74894ffc7d0c ("drm/amdgpu: Add ring reset callback for JPEG4_0_0") Reviewed-by: Sathishkumar S <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Sathishkumar S <[email protected]>
| | * drm/amdgpu/jpeg3: add additional ring reset error checkingAlex Deucher2025-07-161-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Start and stop can fail, so add checks. Fixes: 03399d0bff25 ("drm/amdgpu: Add ring reset callback for JPEG3_0_0") Reviewed-by: Sathishkumar S <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Sathishkumar S <[email protected]>
| | * drm/amdgpu/jpeg2: add additional ring reset error checkingAlex Deucher2025-07-161-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Start and stop can fail, so add checks. Fixes: 500c04d2a708 ("drm/amdgpu: Add ring reset callback for JPEG2_0_0") Reviewed-by: Sathishkumar S <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Sathishkumar S <[email protected]>
| | * drm/amdgpu: clean up sdma reset functionsAlex Deucher2025-07-164-31/+40
| | | | | | | | | | | | | | | | | | | | | Make them consistent and drop unneeded extra variables. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu: refine bad page loading when in the same nps modeganglxie2025-07-151-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | when loading bad page in the same nps mode, need to set the other fields fields in eeprom records manually besides retired_page Signed-off-by: ganglxie <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu: refine eeprom data checkganglxie2025-07-153-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add eeprom data checksum check before driver unload. reset eeprom and save correct data to eeprom when check failed Signed-off-by: ganglxie <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu: The interrupt source was not releasedCe Sun2025-07-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the driver is unloaded, the interrupt source of the rma device is not released, resulting in the failure of hw_init when loading again using bad_page_threshold. Signed-off-by: Ce Sun <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * drm/amdgpu/vcn5: add additional ring reset error checkingAlex Deucher2025-07-151-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Start and stop can fail, so add checks. Fixes: b54695dae995 ("drm/amd: Add per-ring reset for vcn v5.0.0 use") Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Mario Limonciello <[email protected]>
| | * drm/amdgpu/vcn4.0.5: add additional ring reset error checkingAlex Deucher2025-07-151-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Start and stop can fail, so add checks. Fixes: d1a46cdd0053 ("drm/amd: Add per-ring reset for vcn v4.0.5 use") Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Mario Limonciello <[email protected]>
| | * drm/amdgpu/vcn4: add additional ring reset error checkingAlex Deucher2025-07-151-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Start and stop can fail, so add checks. Fixes: b8b6e6f1654d ("drm/amd: Add per-ring reset for vcn v4.0.0 use") Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Mario Limonciello <[email protected]>
| | * drm/amdgpu/gfx10: fix kiq locking in KCQ resetAlex Deucher2025-07-151-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The ring test needs to be inside the lock. Fixes: 097af47d3cfb ("drm/amdgpu/gfx10: wait for reset done before remap") Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Jiadong Zhu <[email protected]>
| | * drm/amdgpu/gfx9.4.3: fix kiq locking in KCQ resetAlex Deucher2025-07-151-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The ring test needs to be inside the lock. Fixes: 4c953e53cc34 ("drm/amdgpu/gfx_9.4.3: wait for reset done before remap") Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Jiadong Zhu <[email protected]>
| | * drm/amdgpu/gfx9: fix kiq locking in KCQ resetAlex Deucher2025-07-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The ring test needs to be inside the lock. Fixes: fdbd69486b46 ("drm/amdgpu/gfx9: wait for reset done before remap") Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Jiadong Zhu <[email protected]>
generated by cgit (git 2.51.2) at 2025-11-30 14:45:54 +0000