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| | * | drm/amdgpu: enable IH doorbell for ring 1&2 on VegaChristian König2019-03-192-24/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The doorbells should already be reserved, just enable them. Signed-off-by: Christian König <[email protected]> Acked-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: change Vega IH ring 1 configChristian König2019-03-191-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Disable overflow and enable full drain. This makes fault handling on ring 1 much more reliable since we don't generate back pressure any more. Signed-off-by: Christian König <[email protected]> Acked-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: Only clear dumb buffers if ring is enabledNicholas Kazlauskas2019-03-191-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The buffers should be cleared when possible but we also don't want buffer creation to fail in the rare case where the ring isn't ready during the call. This could happen during some suspend/resume sequences. Cc: Christian König <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: Clear VRAM for DRM dumb_create buffersNicholas Kazlauskas2019-03-191-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dumb_create API isn't intended for high performance rendering and it's more useful for userspace (ie. IGT) to have them precleared. The bonus here is that we also won't needlessly leak whatever was previously in VRAM, but it also probably wasn't sensitive if it was going through this API. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: fix semicolon.cocci warningskbuild test robot2019-03-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:405:2-3: Unneeded semicolon drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:435:2-3: Unneeded semicolon Remove unneeded semicolon. Generated by: scripts/coccinelle/misc/semicolon.cocci CC: xinhui pan <[email protected]> Signed-off-by: kbuild test robot <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: add new ras workflow control flagsxinhui pan2019-03-193-1/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add ras post init function. Do some initialization after all IP have finished their late init. Add new member flags which will control the ras work flow. For now, vbios enable ras for us on boot. That might change in the future. So there should be a flag from vbios to tell us if ras is enabled or not on boot. Looks like there is no such info now. Other bits of the flags are reserved to control other parts of ras. Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: let ras initialization a little noticeablexinhui pan2019-03-191-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add drm info output if ras initialized successfully. add ras atomfirmware sanity check. Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: Fix lockdep warning more gracelyxinhui pan2019-03-191-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | lockdep need a static key. Previously we set ignore bit to avoid the warning. Now call sysfs_attr_init to initialize the static key. Signed-off-by: xinhui pan <[email protected]> Reviewed-and-Tested-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: Fix ras debugfs data parsexinhui pan2019-03-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unzero char is accepted by sscanf, so when data is structure but unexpectedly return error invalid; Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: add new member hw_supportedxinhui pan2019-03-192-12/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, it is not clear how ras is supported. Both software and hardware can set the supported. That is confusing. Fix it by adding new member hw_supported. Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: Fix warning when lockdep is enabledxinhui pan2019-03-191-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set ignore bit to satisfy locpdep. Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: Fix NULL pointer when ta is missingxinhui pan2019-03-191-9/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ta is optional, so check if ta firmware is loaded or not. Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: fix ras parameter descriptionsEvan Quan2019-03-191-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The descriptions of modinfo wrongly show two parameters for each feature(see below). This patch can fix this incorrect outputs. parm: amdgpu_ras_enable:Enable RAS features on the GPU (0 = disable, 1 = enable, -1 = auto (default)) parm: ras_enable:int parm: amdgpu_ras_mask:Mask of RAS features to enable (default 0xffffffff), only valid when ras_enable == 1 parm: ras_mask:uint Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: xinhui pan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: export both supported and enabled ras featuresxinhui pan2019-03-191-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: lookup vbios table to check ecc capabilityxinhui pan2019-03-191-27/+13
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: query sram ecc/ecc availability from atombiosHawking Zhang2019-03-191-205/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | query sram ecc capability via amdgpu_atomfirmware_ecc_default_enabled query ecc availability via amdgpu_atomfirmware_sram_ecc_supported Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: add atomfirmware helper function to query sram ecc capsHawking Zhang2019-03-192-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sram ecc capability could be get from firmware_capability field in firmwareinfo table Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: add atomfirmware helper function to query ecc statusHawking Zhang2019-03-192-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ecc default status (enabled or disabled) could be get from umc_config field in umc_info table Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: handle ras resumexinhui pan2019-03-193-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Suspend will put irq, so resume need get irq back. And in the same time, skip other ras initialization. Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdkfd: add RAS ECC event support (v3)Eric Huang2019-03-195-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RAS ECC event will combine with GPU reset event, due to ECC interrupts are caused by uncorrectable error that triggers GPU reset. v2: Fix misleading-indentation warning v3: fix build with CONFIG_HSA_AMD disabled Signed-off-by: Eric Huang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: add human readable debugfs control support (v2)xinhui pan2019-03-191-13/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the debugfs control node can't parse bash-like commands. Now add such support for any tester that uses scripts. v2: squash in fixes for input validation Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: skip gpu reset when ras error occuredxinhui pan2019-03-191-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gpu reset is not stable on vega20 A1. Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: add ioctl query for enabled ras features (v2)xinhui pan2019-03-191-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a query for userspace to check which RAS features are enabled. v2: squash in warning fix Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: Add a new flag to AMDGPU_CTX_OP_QUERY_STATE2xinhui pan2019-03-192-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add AMDGPU_CTX_QUERY2_FLAGS_RAS_CE/UE which indicate if any error happened between previous query and this query. Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: enable ras on gmc9xinhui pan2019-03-192-0/+278
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: enable ras on gfx9 (v2)Feifei Xu2019-03-192-0/+176
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Register ecc interrupts and ecc interrupt handler on gfx9. Add ras support on gfx9 v2: squash in warning fix Signed-off-by: Feifei Xu <[email protected]> Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: enable ras on sdma4xinhui pan2019-03-192-1/+187
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | register IH, enable ras features on sdma. create sysfs debugfs file for sdma. Signed-off-by: xinhui pan <[email protected]> Signed-off-by: Feifei Xu <[email protected]> Signed-off-by: Eric Huang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: reserve bad pages during recoveryxinhui pan2019-03-191-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mark vram pages with errors as bad and prevent the driver from using them. Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: add debugfs ctrl nodexinhui pan2019-03-192-10/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | allow userspace enable/disable ras Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: add amdgpu_ras.c to support ras (v2)xinhui pan2019-03-195-1/+1475
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add obj management. add feature control. add debugfs infrastructure. add sysfs infrastructure. add IH infrastructure. add recovery infrastructure. It is a framework. Other IPs need call amdgpu_ras_xxx function instead of psp_ras_xxx functions. v2: squash in warning fixes Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: add psp cmd submit timeoutxinhui pan2019-03-191-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: add psp v11 ras callbackxinhui pan2019-03-191-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add trigger_error and cure_posion. Acked-by: Hawking Zhang <[email protected]> Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: add psp ras subsystem infrastructure (v2)xinhui pan2019-03-192-0/+230
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add ras fw loading, init, terminate. Add ras cmd submit helper. Add ras feature enable/disable common function. v2: squash in unused variable warning fix Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: add psp ras callback func and macroxinhui pan2019-03-191-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define the driver side interface for ras ta. Acked-by: Hawking Zhang <[email protected]> Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: add ta_ras_if.hxinhui pan2019-03-191-0/+108
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: add module parameters for rasxinhui pan2019-03-192-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow RAS feature enable/disable via boot parameter. Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: export ta fw infoxinhui pan2019-03-191-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Output the ta fw, aka xgmi/ras, via debugfs. Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: add ta ras fw info (v2)xinhui pan2019-03-192-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add ras fw part, xgmi and ras fw are combined together in ta binary. Reading the data from the info is not implemented yet. v2: squash in "drm/amdgpu: fix NULL pointer when ta is missing" Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: Cosmetic change for calling func amdgpu_gmc_vram_locationOak Zeng2019-03-194-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use function parameter mc as the second parameter of amdgpu_gmc_vram_location, so codes look more consistent. Signed-off-by: Oak Zeng <[email protected]> Reviewed-by: Christian Konig <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: Move IB pool init and fini v2Andrey Grodzovsky2019-03-191-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Problem: Using SDMA for TLB invalidation in certain ASICs exposed a problem of IB pool not being ready while SDMA already up on Init and already shutt down while SDMA still running on Fini. This caused IB allocation failure. Temproary fix was commited into a bringup branch but this is the generic fix. Fix: Init IB pool rigth after GMC is ready but before SDMA is ready. Do th opposite for Fini. v2: Remove restriction on SDMA early init and move amdgpu_ib_pool_fini Reviewed-by: Christian König <[email protected]> Signed-off-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amd/powerplay: apply Vega20 BACO workaroundEvan Quan2019-03-192-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Applied vdci flush workaround for Vega20 BACO. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: XGMI pstate switch initial supportshaoyunl2019-03-196-1/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Driver vote low to high pstate switch whenever there is an outstanding XGMI mapping request. Driver vote high to low pstate when all the outstanding XGMI mapping is terminated. Signed-off-by: shaoyunl <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: Enable XGMI mapping for peer deviceshaoyunl2019-03-191-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adjust vram base offset for XGMI mapping when update the PT entry so the address will fall into correct XGMI aperture for peer device Signed-off-by: shaoyunl <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: Add sysfs entries for xgmi hive v2.Andrey Grodzovsky2019-03-192-5/+146
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For each device a file xgmi_device_id is created. On the first device a subdirectory named xgmi_hive_info is created, It contains a file named hive_id and symlinks named node 1-4 linking to each device in the hive. v2: Return error codes instead of '-1' and few misspellings. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: allow huge invalid mappings on GMC8Christian König2019-03-191-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only GMC9 supports true huge pages, but we can still free invalid mappings on GMC8. Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: drop the huge page flagChristian König2019-03-192-14/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Not needed any more since we now free PDs/PTs on demand. Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: free PDs/PTs on demandChristian König2019-03-191-18/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When something is unmapped we now free the affected PDs/PTs again. Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: allocate VM PDs/PTs on demandChristian König2019-03-195-129/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's start to allocate VM PDs/PTs on demand instead of pre-allocating them during mapping. Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: let amdgpu_vm_clear_bo figure out ats status v2Christian König2019-03-191-25/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of providing it from outside figure out the ats status in the function itself from the data structures. v2: simplify finding the right level v3: partially revert changes from v2, more cleanup and split code into more functions. Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| | * | drm/amdgpu: rework shadow handling during PD clear v3Christian König2019-03-191-28/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This way we only deal with the real BO in here. v2: use a do { ... } while loop instead v3: fix NULL pointer in v2 Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
generated by cgit (git 2.51.2) at 2025-12-03 17:10:48 +0000