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| * | | drm/amd/powerplay: support enabled ppfeatures retrieving and setting V3Evan Quan2019-01-252-0/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | User can use "ppfeatures" sysfs interface to retrieve and set enabled powerplay features. V2: expose this feature for Vega10 and later dGPUs V3: squash in removal of unused variable (Alex) Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: set bulk_moveable to false when lru changed v2Chunming Zhou2019-01-253-1/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | if lru is changed, we cannot do bulk moving. v2: root bo isn't in bulk moving, skip its change. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu/psp: ignore psp response statusAaron Liu2019-01-251-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In some cases, psp response status is not 0 even there is no problem while the command is submitted. Some version of PSP FW doesn't write 0 to that field. So here we would like to only print a warning instead of an error during psp initialization to avoid breaking hw_init and it doesn't return -EINVAL. Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Xiangliang Yu<[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Reviewed-by: Paul Menzel <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: Setting doorbell range registers earlierOak Zeng2019-01-253-5/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | HW doorbell writing routing policy: writing to doorbell not in SDMA/IH/MM/ACV doorbell range will be routed to CP. So CP doorbell routing depends on doorbell range setting of above blocks. Setting doorbell range of above blocks earlier (soc15_common_hw_init) to make sure CP doorbell writing be routed to CP block. Signed-off-by: Oak Zeng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: Fix sdma doorbell range settingOak Zeng2019-01-255-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Different ASIC has different SDMA queue number so different SDMA doorbell range. Introduce an extra parameter to sdma_doorbell_range function and set sdma doorbell range correctly. Signed-off-by: Oak Zeng <[email protected]> Reviewed-by: Philip Yang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: Add per device sdma_doorbell_range fieldOak Zeng2019-01-253-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Different ASIC has different sdma doorbell range. Add a per device sdma_doorbell_range field and initialize it. Signed-off-by: Oak Zeng <[email protected]> Reviewed-by: Philip Yang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu/soc15: return proper error codes in baco resetAlex Deucher2019-01-251-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than just -1. Reviewed-by: JimQu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: use BACO reset on vega20 if platform supportJim Qu2019-01-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jim Qu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: use BACO reset if platform support (v2)Jim Qu2019-01-251-3/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It will fall back to use mode1 reset if platform does not support BACO feature. v2: squash in warning fix (Alex) Signed-off-by: Jim Qu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: check if we need to reset at init time (v2)Alex Deucher2019-01-141-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To deal with situations like kexec or GPU VM passthrough where the device may have been used previously without a proper GPU reset between. v2: rebase bug: https://bugs.freedesktop.org/show_bug.cgi?id=108585 bug: https://bugs.freedesktop.org/show_bug.cgi?id=108754 Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu/soc15: add need_reset_on_init asic callback for SOC15 (v2)Alex Deucher2019-01-141-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SOC15 chips require a reset if the driver was previously loaded because the PSP can only be loaded once between each reset. v2: rebase, handle multiple asic funcs Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu/vi: add need_reset_on_init asic callback for VI (v2)Alex Deucher2019-01-141-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | VI chips require a reset if the driver was previously loaded because the SMU can only be loaded once between each reset. v2: rebase Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu/cik: add need_reset_on_init asic callback for CIK (v2)Alex Deucher2019-01-141-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CIK chips require a reset if the driver was previously loaded because the SMU can only be loaded once between each reset. v2: rebase Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu/si: add need_reset_on_init asic callback for SI (v2)Alex Deucher2019-01-141-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SI chips don't require a reset on reload due to the nature of the SMU on them. v2: rebase Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: add need_reset_on_init asic callback (v2)Alex Deucher2019-01-141-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Used to determine if we need to reset the asic on init due to the driver having been previously loaded or not shutdown cleanly. E.g., kexec or VM passthrough. v2: rebase Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: expose sclk and mclk via hwmonAlex Deucher2019-01-141-0/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Expose sclk (gfx clock) and mclk (memory clock) via hwmon compatible interface. hwmon does not actually formally specify a frequency type attribute, but these are compatible with the format of the other attributes exposed via hwmon. Units are hertz. freq1_input - GPU gfx/compute clock in hertz freq2_input - GPU memory clock in hertz (dGPU only) Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: Add sysfs file for PCIe usage v5Kent Russell2019-01-146-0/+232
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a sysfs file that reports the number of bytes transmitted and received in the last second. This can be used to approximate the PCIe bandwidth usage over the last second. v2: Clarify use of mps as estimation of bandwidth v3: Don't make the file on APUs v4: Early exit for APUs in the read function, change output to display "packets-received packets-sent mps" v5: fix missing header for si (Alex) Signed-off-by: Kent Russell <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: Add NBIO SMN headers v2Kent Russell2019-01-143-12/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need these offsets for PCIE perf counters, so include them as well as the the previously-used defines from the nbio_*.c files v2: Return NBIF definitions back to previous files Signed-off-by: Kent Russell <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amd/amdgpu: add missing mutex lock to amdgpu_get_xgmi_hive() (v3)Tom St Denis2019-01-143-19/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: Move locks around in other functions so that this function can stand on its own. Also only hold the hive specific lock for add/remove device instead of the driver global lock so you can't add/remove devices in parallel from one hive. v3: add reset_lock Acked-by: Shaoyun.liu < [email protected]> Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: Add message print when unable to get valid hiveshaoyunl2019-01-141-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add message print out and return -EINVAL when driver can not get valid hive from hive arrary on xgmi configuration Signed-off-by: shaoyunl <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu/psp: make get_fw_type and prep_cmd_buf to be common interfacesHawking Zhang2019-01-145-241/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | get_fw_type and prep_cmd_buf should be common interface instead of IP specific ones Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu/psp: update the naming of GFX_FW_TYPE_RLC_RESTORE_LIST_CNTLHawking Zhang2019-01-142-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GFX_FW_TYPE_RLC_RESTORE_LIST_CNTL was renamed to GFX_FW_TYPE_RLC_RESTORE_LIST_SRM_CNTL in latest psp_gfx_if drop Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu_vm: fix boolean expressionsGustavo A. R. Silva2019-01-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix boolean expressions by using logical AND operator '&&' instead of bitwise operator '&'. This issue was detected with the help of Coccinelle. Fixes: 9a4b7d4c769e ("drm/amdgpu: Add vm context module param") Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu/sriov: For finishing routine send rel event after init failedEmily Deng2019-01-141-11/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When init fail, send rel init, req_fini and rel_fini to host for the finishing routine. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: improve GMC v9 page fault messageChristian König2019-01-141-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Note if this is a retry fault or not and cleanup the message a bit. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: distinguish early and late re-init log in sriovwentalou2019-01-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | distinguish ip_reinit_early_sriov and ip_reinit_late_sriov by different log RE-INIT-early and RE-INIT-late Signed-off-by: Wentao Lou <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: add the IH to the IV traceChristian König2019-01-142-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To distinct on which IH ring an IV was found. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: fix IH overflow on Vega10 v2Christian König2019-01-141-14/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When an ring buffer overflow happens the appropriate bit is set in the WPTR register which is also written back to memory. But clearing the bit in the WPTR doesn't trigger another memory writeback. So what can happen is that we end up processing the buffer overflow over and over again because the bit is never cleared. Resulting in a random system lockup because of an infinite loop in an interrupt handler. This is 100% reproducible on Vega10, but it's most likely an issue we have in the driver over all generations all the way back to radeon. v2: rebase Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: simplify IH programmingChristian König2019-01-148-85/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calculate all the addresses and pointers in amdgpu_ih.c Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: add IH ring to ih_get_wptr/ih_set_rptr v2Christian König2019-01-148-110/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's start to support multiple rings. v2: decode IV is needed as well Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu/gmc: fix compiler errors [-Werror,-Wmissing-braces] (V2)Shirish S2019-01-142-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initializing structures with { } is known to be problematic since it doesn't necessararily initialize all bytes, in case of padding, causing random failures when structures are memcmp(). This patch fixes the structure initialisation related compiler error by memset(). V2: rectified missing piece in coding Signed-off-by: Shirish S <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: psp_ring_destroy cause psp->km_ring.ring_mem NULLwentalou2019-01-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | psp_ring_destroy inside psp_load_fw cause psp->km_ring.ring_mem NULL. Call Trace occurred when psp_cmd_submit. should be psp_ring_stop instead. Reviewed-by: Xiangliang Yu <[email protected]> Signed-off-by: Wentao Lou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu/psp: Fix can't detect psp INVOKE command failedXiangliang Yu2019-01-141-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There isn't ucode when executing INVOKE command, so current code can't check the failure of INVOKE command. Remove the ucode check. Signed-off-by: Xiangliang Yu <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: Use sdma_engine arrayOak Zeng2019-01-147-32/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use sdma_engine[8] array instead of sdma_engine0~7 so it is easier to program. Signed-off-by: Oak Zeng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu/psp: Fix to get wrong xgmi session idXiangliang Yu2019-01-141-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Driver get session id after loading TA FW and the session id is used by driver instances to communicate with TA. PF and VF have different session id. xGMI session id should get from response buffer, correct it. Signed-off-by: Xiangliang Yu <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: Remove kgd2kfd function pointersAmber Lin2019-01-142-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | kgd2kfd function pointers and global kgd2kfd pointer are no longer in use. Signed-off-by: Amber Lin <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: Simplify kgd2kfd interfaceAmber Lin2019-01-143-21/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After amdkfd is merged into amdgpu module, amdgpu can call amdkfd functions directly. Signed-off-by: Amber Lin <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: Relocate kgd2kfd function declarationAmber Lin2019-01-144-1/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since amdkfd is merged into amdgpu module and amdgpu can access amdkfd directly, move declaration of kgd2kfd functions from kfd_priv.h to amdgpu_amdkfd.h Signed-off-by: Amber Lin <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: disable system memory page tables for nowChristian König2019-01-141-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We hit a problem with IOMMU with that. Disable until we have time to debug further. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: set WRITE_BURST_LENGTH to 64B to workaround SDMA1 hangJim Qu2019-01-141-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | effect asics: VEGA10 and VEGA12 Signed-off-by: Jim Qu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: fix CPDMA hang in PRT mode for VEGA20Tao Zhou2019-01-141-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix CPDMA hang in PRT mode for both VEGA10 and VEGA20 Signed-off-by: Tao Zhou <[email protected]> Tested-by: Yukun.Li <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amd/powerplay: create pp_od_clk_voltage device file under OD supportEvan Quan2019-01-141-8/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since pp_od_clk_voltage device file is for OD related sysfs operations. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: make gfx9 enter into rlc safe mode when set MGCGLikun Gao2019-01-141-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MGCG should RLC enter into safe mode first. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu: Cleanup 2 compiler warningsKent Russell2019-01-141-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These 2 variables are unused now, so remove their references. Fixes: e4ae0fc drm/amdgpu: implement gfx8 post_soft_reset Fixes: 5e01c09 drm/amdgpu/gfx_v8_0: Reorder the gfx, kiq and kcq rings test sequence Signed-off-by: Kent Russell <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu/gfx_v8_0: Reorder the gfx, kiq and kcq rings test sequenceTiecheng Zhou2019-01-141-13/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kiq ring and the very first compute ring may fail occasionally if they are tested directly following kiq_kcq_enable. Insert the gfx ring test before kiq ring test to delay the kiq and kcq ring tests will fix the issue. Acked-by: Alex Deucher <[email protected]> Signed-off-by: Tiecheng Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu/sriov:Correct pfvf exchange logicEmily Deng2019-01-142-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pfvf exchange need be in exclusive mode. And add pfvf exchange in gpu reset. Signed-off-by: Emily Deng <[email protected]> Reviewed-By: Xiangliang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu/virtual_dce: No need to pin the cursor boEmily Deng2019-01-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For virtual display feature, no need to pin cursor bo. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * | | drm/amdgpu/virtual_dce: No need to pin the fb's boEmily Deng2019-01-142-22/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For virtual display, no need to pin the fb's bo. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* | | | drm: move drm_can_sleep() to drm_util.hSam Ravnborg2019-01-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move drm_can_sleep() out of drmP.h to allow users to get rid of the drmP.h include. There was no header file that was a good match for this helper function. So add this to drm_util with the relevant includes. Add include of drm_util.h to all users. v2: - Update comments to use kernel-doc style (Daniel) - Add FIXME to drm_can_sleep and add note that this function should not be used in new code (Daniel) v3: - Fix kernel-doc syntax (Daniel) - Plug drm_util.h into drm-internels.rst (Daniel) Signed-off-by: Sam Ravnborg <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Sean Paul <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Alex Deucher <[email protected]> Cc: "Christian König" <[email protected]> Cc: "David (ChunMing) Zhou" <[email protected]> Cc: Gerd Hoffmann <[email protected]> Cc: Rob Clark <[email protected]> Cc: Tomi Valkeinen <[email protected]> Cc: Eric Anholt <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
* | | | drm: Move the legacy kms disable_all helper to crtc helpersDaniel Vetter2019-01-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's not a core function, and the matching atomic functions are also not in the core. Plus the suspend/resume helper is also already there. Needs a tiny bit of open-coding, but less midlayer beats that I think. v2: Rebase onto ast (which gained a new user). Cc: Sam Bobroff <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Sean Paul <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Sean Paul <[email protected]> Cc: David Airlie <[email protected]> Cc: Ben Skeggs <[email protected]> Cc: Alex Deucher <[email protected]> Cc: "Christian König" <[email protected]> Cc: "David (ChunMing) Zhou" <[email protected]> Cc: Rex Zhu <[email protected]> Cc: Andrey Grodzovsky <[email protected]> Cc: Huang Rui <[email protected]> Cc: Shaoyun Liu <[email protected]> Cc: Monk Liu <[email protected]> Cc: [email protected] Cc: [email protected] Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
generated by cgit (git 2.51.2) at 2025-12-03 21:16:21 +0000