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* drm/amdkfd: Update SMI throttle event bitmaskGraham Sider2021-07-231-2/+2
| | | | | | | | | Update Arcturus/Aldebaran thermal throttle SMI event path to use ASIC-independent throttler bits when logging. Signed-off-by: Graham Sider <[email protected]> Reviewed-by: Harish Kasiviswanathan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Change a few function namesOak Zeng2021-07-231-8/+8
| | | | | | | | | | | | Function name "psp_np_fw_load" is not proper as people don't know _np_fw_ means "non psp firmware". Change the function name to psp_load_non_psp_fw for better understanding. Same thing for function psp_execute_np_fw_load. Signed-off-by: Oak Zeng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian Konig <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Fix a printing messageOak Zeng2021-07-234-4/+4
| | | | | | | | | | | | The printing message "PSP loading VCN firmware" is mis-leading because people might think driver is loading VCN firmware. Actually when this message is printed, driver is just preparing some VCN ucode, not loading VCN firmware yet. The actual VCN firmware loading will be in the PSP block hw_init. Fix the printing message Signed-off-by: Oak Zeng <[email protected]> Reviewed-by: Christian Konig <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Add error message when programing registers failsRoy Sun2021-07-231-4/+22
| | | | | | | | Squash in warning fix (Alex) Signed-off-by: Roy Sun <[email protected]> Reviewed-by: Zhou pengju <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Change the imprecise function nameRoy Sun2021-07-235-13/+13
| | | | | | | | | The callback functions are used for SRIOV read/write instead of just for rlcg read/write Signed-off-by: Roy Sun <[email protected]> Reviewed-by: Zhou pengju <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu - Corrected the video codecs array name for yellow carpVeerabadhran Gopalakrishnan2021-07-231-2/+2
| | | | | | Signed-off-by: Veerabadhran Gopalakrishnan <[email protected]> Reviewed-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdkfd: report pcie bandwidth to the kfdJonathan Kim2021-07-232-0/+60
| | | | | | | | | Similar to xGMI reporting the min/max bandwidth between direct peers, PCIe will report the min/max bandwidth to the KFD. Signed-off-by: Jonathan Kim <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdkfd: report xgmi bandwidth between direct peers to the kfdJonathan Kim2021-07-234-0/+39
| | | | | | | | | | Report the min/max bandwidth in megabytes to the kfd for direct xgmi connections only. Indirect peers will report 0 since indirect route is unknown. Signed-off-by: Jonathan Kim <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add psp command to get num xgmi links between direct peersJonathan Kim2021-07-233-1/+37
| | | | | | | | | | The TA can now be invoked to provide the number of xgmi links connecting a direct source and destination peer. Non-direct peers will report zero links. Signed-off-by: Jonathan Kim <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Fix documentaion for amdgpu_bo_add_to_shadow_listAnson Jacob2021-07-231-1/+1
| | | | | | | | | | | | make htmldocs complaints about parameter for amdgpu_bo_add_to_shadow_list ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.c:739: warning: Excess function parameter 'bo' description in 'amdgpu_bo_add_to_shadow_list' ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.c:739: warning: Function parameter or member 'vmbo' not described in 'amdgpu_bo_add_to_shadow_list' ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.c:739: warning: Excess function parameter 'bo' description in 'amdgpu_bo_add_to_shadow_list' Signed-off-by: Anson Jacob <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu/ttm: optimize vram access in amdgpu_ttm_access_memory()Kevin Wang2021-07-161-34/+47
| | | | | | | | | | 1. using vram aper to access vram if possible 2. avoid MM_INDEX/MM_DATA is not working when mmio protect feature is enabled. Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu/ttm: replace duplicate code with exiting functionKevin Wang2021-07-161-6/+1
| | | | | | | | | using exiting function to replace duplicate code blocks in amdgpu_ttm_vram_write(). Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: split amdgpu_device_access_vram() into two small partsKevin Wang2021-07-162-31/+81
| | | | | | | | | | split amdgpu_device_access_vram() 1. amdgpu_device_mm_access(): using MM_INDEX/MM_DATA to access vram 2. amdgpu_device_aper_access(): using vram aperature to access vram (option) Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: update gc golden setting for dimgrey_cavefishTao Zhou2021-07-161-0/+1
| | | | | | | | Update gc_10_3_4 golden setting. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: update golden setting for sienna_cichlidLikun Gao2021-07-161-0/+1
| | | | | | | | Update GFX golden setting for sienna_cichlid. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: update the golden setting for vangoghXiaojian Du2021-07-161-0/+1
| | | | | | | | This patch is to update the golden setting for vangogh. Signed-off-by: Xiaojian Du <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Switch to LFB for USBC PD FW in psp v13Andrey Grodzovsky2021-07-161-0/+66
| | | | | | | | Add USBC PD FW implementation here to be used with relevant ASICs. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Alexander Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Switch to VRAM buffer for USBC PD FW.Andrey Grodzovsky2021-07-163-51/+29
| | | | | | | | | | System memory-based implementation for updating the USBCPD is deprecated for so switching to LFB based implementation for all the ASICs. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Alexander Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/nv.c - Optimize code for video codec support structureVeerabadhran Gopalakrishnan2021-07-163-350/+56
| | | | | | | | Optimized the code for codec info structure initialization Signed-off-by: Veerabadhran Gopalakrishnan <[email protected]> Reviewed-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* amdgpu/nv.c - Added video codec support for Yellow CarpVeerabadhran Gopalakrishnan2021-07-161-1/+19
| | | | | | | | Added the supported codecs in the video capabilities query. Signed-off-by: Veerabadhran Gopalakrishnan <[email protected]> Reviewed-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add another Renoir DIDJinzhou Su2021-07-141-0/+1
| | | | | | | | | Add new PCI device id. Signed-off-by: Jinzhou Su <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Resolve bug in UMC 6.7 error offset calculationJohn Clements2021-07-131-2/+2
| | | | | | | | Use correct channel and instance values Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* Revert "drm/amdgpu: Add table_freed parameter to amdgpu_vm_bo_update"Eric Huang2021-07-134-10/+10
| | | | | | | | | This reverts commit 075e8080c1a7571563171a07fa9ce47c4bc80044. Reason for revert: the related commit is reverted. Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* Revert "drm/amdkfd: Make TLB flush conditional on mapping"Eric Huang2021-07-132-12/+9
| | | | | | | | | This reverts commit 31f33243788dcbae8bd2819ed83923a73f7dfd30. Reason for revert: it causes regressions on several Asics. Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* Revert "drm/amdgpu: Fix warning of Function parameter or member not described"Eric Huang2021-07-131-1/+0
| | | | | | | | | This reverts commit 7a68d188d1c4a9d947369acaa19040a58baaaeda. Reason for revert: the related commit is reverted. Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* Revert "drm/amdkfd: Only apply TLB flush optimization on ALdebaran"Eric Huang2021-07-131-6/+0
| | | | | | | | | This reverts commit 51627f03804173a64d23828bc9e4d8474451814f. Reason for revert: it causes regression on Aldebaran. Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Restore msix after FLREmily.Deng2021-07-131-0/+18
| | | | | | | | | After FLR, the msix will be cleared, so need to re-enable it. Signed-off-by: Peng Ju Zhou <[email protected]> Signed-off-by: Emily.Deng <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdkfd: Allow CPU access for all VRAM BOsFelix Kuehling2021-07-131-2/+1
| | | | | | | | | The thunk needs to mmap all BOs for CPU access to allow the debugger to access them. Invisible ones are mapped with PROT_NONE. Fixes: 71df0368e9b6 ("drm/amdgpu: Implement mmap as GEM object function") Signed-off-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: initialize umc ras functionJohn Clements2021-07-083-0/+43
| | | | | | | | | | | support umc ras function initialization for aldebaran v2: squash in compile fix Signed-off-by: John Clements <[email protected]> Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Correct the irq numbers for virtual crtcEmily Deng2021-07-081-1/+1
| | | | | | | | | The irq number should be decided by num_crtc, and the num_crtc could change by parameter. Signed-off-by: Emily Deng <[email protected]> Reviewed by: Monk Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: return -EFAULT if copy_to_user() failsDan Carpenter2021-07-081-2/+2
| | | | | | | | | | If copy_to_user() fails then this should return -EFAULT instead of -EINVAL. Fixes: c65b0805e77919 ("drm/amdgpu: RAS EEPROM table is now in debugfs") Signed-off-by: Dan Carpenter <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: unlock on error in amdgpu_ras_debugfs_table_read()Dan Carpenter2021-07-081-3/+5
| | | | | | | | | | | This error path needs to unlock before returning. While we're at it, the correct error code from copy_to_user() failure is -EFAULT, not -EINVAL. Fixes: c65b0805e77919 ("drm/amdgpu: RAS EEPROM table is now in debugfs") Signed-off-by: Dan Carpenter <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Fix signedness bug in __amdgpu_eeprom_xfer()Dan Carpenter2021-07-081-1/+1
| | | | | | | | | | | | | | | The i2c_transfer() function returns negatives or else the number of messages transferred. This code does not work because ARRAY_SIZE() is type size_t and so that means negative values of "r" are type promoted to high positive values which are greater than the ARRAY_SIZE(). Fix this by changing the < to != which works regardless of type promotion. Fixes: 746b584762e452 ("drm/amdgpu: Fixes to the AMDGPU EEPROM driver") Signed-off-by: Dan Carpenter <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: fix a signedness bug in __verify_ras_table_checksum()Dan Carpenter2021-07-081-2/+1
| | | | | | | | | | | | | | | | If amdgpu_eeprom_read() returns a negative error code then the error handling checks: if (res < buf_size) { The problem is that "buf_size" is a u32 so negative values are type promoted to a high positive values and the condition is false. Fix this by changing the type of "buf_size" to int. Fixes: 63d4c081a556a1 ("drm/amdgpu: Optimize EEPROM RAS table I/O") Signed-off-by: Dan Carpenter <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Return error if no RASLuben Tuikov2021-07-082-17/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | In amdgpu_ras_query_error_count() return an error if the device doesn't support RAS. This prevents that function from having to always set the values of the integer pointers (if set), and thus prevents function side effects--always to have to set values of integers if integer pointers set, regardless of whether RAS is supported or not--with this change this side effect is mitigated. Also, if no pointers are set, don't count, since we've no way of reporting the counts. Also, give this function a kernel-doc. Cc: Alexander Deucher <[email protected]> Cc: John Clements <[email protected]> Cc: Hawking Zhang <[email protected]> Reported-by: Tom Rix <[email protected]> Fixes: a46751fbcde505 ("drm/amdgpu: Fix RAS function interface") Signed-off-by: Luben Tuikov <[email protected]> Reviewed-by: Alexander Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: SRIOV flr_work should take write_lockJingwen Chen2021-07-082-4/+4
| | | | | | | | | | | | | [Why] If flr_work takes read_lock, then other threads who takes read_lock can access hardware when host is doing vf flr. [How] flr_work should take write_lock to avoid this case. Signed-off-by: Jingwen Chen <[email protected]> Reviewed-by: Monk Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: The I2C IP doesn't support 0 writes/readsLuben Tuikov2021-07-081-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The I2C IP doesn't support writes or reads of 0 bytes. In order for a START/STOP transaction to take place on the bus, the data written/read has to be at least one byte. That is, you cannot generate a write with 0 bytes, just to get the ACK from a device, just so you can probe that device if it is on the bus and so to discover all devices on the bus--you'll have to read at least one byte. Writes of 0 bytes generate no START/STOP on this I2C IP--the bus is not engaged at all. Set the I2C_AQ_NO_ZERO_LEN to the existing I2C quirk tables for Aldebaran, Arcturus, Navi10 and Sienna Cichlid, and add a quirk table to the I2C driver which drives the bus when the SMU doesn't--for instance on Vega20. Cc: Alexander Deucher <[email protected]> Cc: Andrey Grodzovsky <[email protected]> Cc: Lijo Lazar <[email protected]> Cc: John Clements <[email protected]> Cc: Hawking Zhang <[email protected]> Signed-off-by: Luben Tuikov <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Read clock counter via MMIO to reduce delay (v5)YuBiao Wang2021-07-081-7/+14
| | | | | | | | | | | | | | | | | | | | | | [Why] GPU timing counters are read via KIQ under sriov, which will introduce a delay. [How] It could be directly read by MMIO. v2: Add additional check to prevent carryover issue. v3: Only check for carryover for once to prevent performance issue. v4: Add comments of the rough frequency where carryover happens. v5: Remove mutex and gfxoff ctrl unused with current timing registers. Signed-off-by: YuBiao Wang <[email protected]> Acked-by: Horace Chen <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Monk Liu <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdkfd: Only apply TLB flush optimization on ALdebaranEric Huang2021-07-081-0/+6
| | | | | | | | | | It is based on reverting two patches back. drm/amdkfd: Make TLB flush conditional on mapping drm/amdgpu: Add table_freed parameter to amdgpu_vm_bo_update Signed-off-by: Eric Huang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: separate out vm pasid assignmentNirmoy Das2021-07-084-29/+26
| | | | | | | | | | | Use new helper function amdgpu_vm_set_pasid() to assign vm pasid value. This also ensures that we don't free a pasid from vm code as pasids are allocated somewhere else. Signed-off-by: Nirmoy Das <[email protected]> Acked-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: use xarray for storing pasid in vmNirmoy Das2021-07-082-82/+73
| | | | | | | | | | Replace idr with xarray as we actually need hash functionality. Cleanup code related to vm pasid by adding helper function. Signed-off-by: Nirmoy Das <[email protected]> Acked-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Avoid printing of stack contents on firmware load errorJiri Kosina2021-07-011-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | In case when psp_init_asd_microcode() fails to load ASD microcode file, psp_v12_0_init_microcode() tries to print the firmware filename that failed to load before bailing out. This is wrong because: - the firmware filename it would want it print is an incorrect one as psp_init_asd_microcode() and psp_v12_0_init_microcode() are loading different filenames - it tries to print fw_name, but that's not yet been initialized by that time, so it prints random stack contents, e.g. amdgpu 0000:04:00.0: Direct firmware load for amdgpu/renoir_asd.bin failed with error -2 amdgpu 0000:04:00.0: amdgpu: fail to initialize asd microcode amdgpu 0000:04:00.0: amdgpu: psp v12.0: Failed to load firmware "\xfeTO\x8e\xff\xff" Fix that by bailing out immediately, instead of priting the bogus error message. Reported-by: Vojtech Pavlik <[email protected]> Signed-off-by: Jiri Kosina <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Fix resource leak on probe error pathJiri Kosina2021-07-011-6/+2
| | | | | | | | | | | | | | | | | | | | | | | This reverts commit 4192f7b5768912ceda82be2f83c87ea7181f9980. It is not true (as stated in the reverted commit changelog) that we never unmap the BAR on failure; it actually does happen properly on amdgpu_driver_load_kms() -> amdgpu_driver_unload_kms() -> amdgpu_device_fini() error path. What's worse, this commit actually completely breaks resource freeing on probe failure (like e.g. failure to load microcode), as amdgpu_driver_unload_kms() notices adev->rmmio being NULL and bails too early, leaving all the resources that'd normally be freed in amdgpu_acpi_fini() and amdgpu_device_fini() still hanging around, leading to all sorts of oopses when someone tries to, for example, access the sysfs and procfs resources which are still around while the driver is gone. Fixes: 4192f7b57689 ("drm/amdgpu: unmap register bar on device init failure") Reported-by: Vojtech Pavlik <[email protected]> Signed-off-by: Jiri Kosina <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: show explicit name instead of id in psp_cmd_submit_bufLang Yu2021-07-011-4/+4
| | | | | | | | | | | Use amdgpu_ucode_name to show ucode name and psp_gfx_cmd_name to show psp_gfx_cmd name in psp_cmd_submit_buf. v2: adjust function name Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add function to show psp_gfx_cmd name via idLang Yu2021-07-011-0/+38
| | | | | | | | | | | Implement function psp_gfx_cmd_name to show cmd name via cmd id. v2: rename it to psp_gfx_cmd_name Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add function to show ucode name via idLang Yu2021-07-012-0/+80
| | | | | | | | | | | Implement function amdgpu_ucode_name to show ucode name via ucode id. v2: rename it to amdgpu_ucode_name Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Correctly disable the I2C IP blockLuben Tuikov2021-07-011-18/+62
| | | | | | | | | | | | | | | | | | | | | | | | | On long transfers to the EEPROM device, i.e. write, it is observed that the driver aborts the transfer. The reason for this is that the driver isn't patient enough--the IC_STATUS register's contents is 0x27, which is MST_ACTIVITY | TFE | TFNF | ACTIVITY. That is, while the transmission FIFO is empty, we, the I2C master device, are still driving the bus. Implement the correct procedure to disable the block, as described in the DesignWare I2C Databook, section 3.8.3 Disabling DW_apb_i2c on page 56. Now there are no premature aborts on long data transfers. Cc: Alexander Deucher <[email protected]> Cc: Andrey Grodzovsky <[email protected]> Signed-off-by: Luben Tuikov <[email protected]> Acked-by: Alexander Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Use a single loopLuben Tuikov2021-07-011-35/+31
| | | | | | | | | | | In smu_v11_0_i2c_transmit() use a single loop to transmit bytes, instead of two nested loops. Cc: Alexander Deucher <[email protected]> Cc: Andrey Grodzovsky <[email protected]> Signed-off-by: Luben Tuikov <[email protected]> Reviewed-by: Alexander Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Fix koops when accessing RAS EEPROMLuben Tuikov2021-07-011-4/+12
| | | | | | | | | | | | | | | | | | | | | Debugfs RAS EEPROM files are available when the ASIC supports RAS, and when the debugfs is enabled, an also when "ras_enable" module parameter is set to 0. However in this case, we get a kernel oops when accessing some of the "ras_..." controls in debugfs. The reason for this is that struct amdgpu_ras::adev is unset. This commit sets it, thus enabling access to those facilities. Note that this facilitates EEPROM access and not necessarily RAS features or functionality. Cc: Alexander Deucher <[email protected]> Cc: John Clements <[email protected]> Cc: Hawking Zhang <[email protected]> Signed-off-by: Luben Tuikov <[email protected]> Acked-by: Alexander Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: fix 64 bit divide in eeprom codeAlex Deucher2021-07-011-5/+9
| | | | | | | | | | pos is 64 bits. Fixes: c65b0805e77919 ("drm/amdgpu: RAS EEPROM table is now in debugfs") Cc: [email protected] Reported-by: kernel test robot <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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