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| * Merge tag 'drm-misc-next-2019-06-14' of ↵Daniel Vetter2019-06-141-1/+4
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for v5.3: UAPI Changes: Cross-subsystem Changes: - Add code to signal all dma-fences when freed with pending signals. - Annotate reservation object access in CONFIG_DEBUG_MUTEXES Core Changes: - Assorted documentation fixes. - Use irqsave/restore spinlock to add crc entry. - Move code around to drm_client, for internal modeset clients. - Make drm_crtc.h and drm_debugfs.h self-contained. - Remove drm_fb_helper_connector. - Add bootsplash to todo. - Fix lock ordering in pan_display_legacy. - Support pinning buffers to current location in gem-vram. - Remove the now unused locking functions from gem-vram. - Remove the now unused kmap-object argument from vram helpers. - Stop checking return value of debugfs_create. - Add atomic encoder enable/disable helpers. - pass drm_atomic_state to atomic connector check. - Add atomic support for bridge enable/disable. - Add self refresh helpers to core. Driver Changes: - Add extra delay to make MTP SDM845 work. - Small fixes to virtio, vkms, sii902x, sii9234, ast, mcde, analogix, rockchip. - Add zpos and ?BGR8888 support to meson. - More removals of drm_os_linux and drmP headers for amd, radeon, sti, r128, r128, savage, sis. - Allow synopsis to unwedge the i2c hdmi bus. - Add orientation quirks for GPD panels. - Edid cleanups and fixing handling for edid < 1.2. - Add runtime pm to stm. - Handle s/r in dw-hdmi. - Add hooks for power on/off to dsi for stm. - Remove virtio dirty tracking code, done in drm core. - Rework BO handling in ast and mgag200. Tiny conflict in drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c, needed #include <linux/slab.h> to make it compile. Signed-off-by: Daniel Vetter <[email protected]> From: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
| | * drm/amd: drop use of drmP.h in amdgpu/amdgpu*Sam Ravnborg2019-06-101-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop use of drmP.h in all files named amdgpu* in drm/amd/amdgpu/ Fix fallout. Signed-off-by: Sam Ravnborg <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Cc: "Christian König" <[email protected]> Cc: "David (ChunMing) Zhou" <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
* | | drm/amdgpu: set the default value of pa_sc_tile_steering_overrideHawking Zhang2019-06-211-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | So userspace can access it. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* | | drm/amdgpu: enable the static csa when mcbp enabledJack Xiao2019-06-211-3/+3
|/ / | | | | | | | | | | | | | | CSA is the Context Save Area for preemption. Acked-by: Hawking Zhang <[email protected]> Signed-off-by: Jack Xiao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* | drm/amdgpu: fix a race in GPU reset with IB test (v2)Alex Deucher2019-06-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split late_init into two functions, one (do_late_init) which just does the hw init, and late_init which calls do_late_init and schedules the IB test work. Call do_late_init in the GPU reset code to run the init code, but not schedule the IB test code. The IB test code is called directly in the gpu reset code so no need to run the IB tests in a separate work thread. If we do, we end up racing. v2: Rework late_init. Pull out the mgpu fan boost and xgmi pstate code into late_init so they get called in all cases. rename the late_init worker thread to delayed work since it's just the IB tests now which can happen later. Schedule the work at init and resume time. It's not needed at reset time because the IB tests are called directly. Reviewed-by: Christian König <[email protected]> Cc: Xinhui Pan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* | drm/amdgpu: remove static GDS, GWS and OA allocationChristian König2019-05-241-7/+4
|/ | | | | | | | As far as we know this was never used by userspace and so should be removed. Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: support dpm level modification under virtualization v3Yintian Tao2019-04-101-0/+4
| | | | | | | | | | | | | | Under vega10 virtualuzation, smu ip block will not be added. Therefore, we need add pp clk query and force dpm level function at amdgpu_virt_ops to support the feature. v2: add get_pp_clk existence check and use kzalloc to allocate buf v3: return -ENOMEM for allocation failure and correct the coding style Signed-off-by: Yintian Tao <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* Merge branch 'drm-next-5.2' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2019-04-031-0/+34
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next amdgpu: - Switch to HMM for userptr (reverted until HMM fixes land) - New experimental SMU 11 replacement for powerplay for vega20 (not enabled by default) - Initial RAS support for vega20 - BACO support for vega12 - BACO fixes for vega20 - Rework IH handling for page fault and retry interrupts - Cleanly split CPU and GPU paths for GPUVM updates - Powerplay fixes - XGMI fixes - Rework how DC interacts with atomic for planes - Clean up and simplify DC/Powerplay interfaces - Misc cleanups and bug fixes amdkfd: - Switch to HMM for userptr (reverted until HMM fixes land) - Add initial RAS support - MQD fixes ttm: - Unify DRM_FILE_PAGE_OFFSET handling - Account for kernel allocations in kernel zone only - Misc cleanups Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
| * drm/amdgpu: export both supported and enabled ras featuresxinhui pan2019-03-191-2/+5
| | | | | | | | | | | | Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * drm/amdgpu: add ioctl query for enabled ras features (v2)xinhui pan2019-03-191-0/+10
| | | | | | | | | | | | | | | | | | | | | | Add a query for userspace to check which RAS features are enabled. v2: squash in warning fix Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
| * drm/amdgpu: export ta fw infoxinhui pan2019-03-191-0/+21
| | | | | | | | | | | | | | | | Output the ta fw, aka xgmi/ras, via debugfs. Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* | Merge v5.0 into drm-nextDave Airlie2019-03-041-0/+1
|\ \ | |/ |/| | | | | | | | | | | There is a really hairy resolution involving amdgpu fixes, that I'd rather confirm here. Also some misc fixes are landed by me, but the pr has them as well. Signed-off-by: Dave Airlie <[email protected]>
| * drm/amdgpu: Set DPM_FLAG_NEVER_SKIP when enabling PM-runtimeAlex Deucher2019-02-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on a similar patch from Rafael for radeon. When using ATPX to control dGPU power, the state is not retained across suspend and resume cycles by default. This can probably be loosened for Hybrid Graphics (_PR3) laptops where I think the state is properly retained. Fixes: c62ec4610c40 ("PM / core: Fix direct_complete handling for devices with no callbacks") Cc: Rafael J. Wysocki <[email protected]> Acked-by: Rafael J. Wysocki <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
* | drm/amdgpu: fix several indentation issuesColin Ian King2019-02-131-1/+1
|/ | | | | | | | There are several statements that are incorrectly indented. Fix these. Reviewed-by: Christian König <[email protected]> Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: wait for IB test on first device openChristian König2018-11-301-3/+3
| | | | | | | | | | Instead of delaying that to the first query. Otherwise we could try to use the SDMA for VM updates before the IB tests are done. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Refine CSA related functionsRex Zhu2018-11-051-1/+4
| | | | | | | | | | | | There is no functional changes, Use function arguments for SRIOV special variables which is hardcode in those functions. so we can share those functions in baremetal. Reviewed-by: Monk Liu <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Retire amdgpu_ring.ready flag v4Andrey Grodzovsky2018-11-051-9/+9
| | | | | | | | | | | | | | | Start using drm_gpu_scheduler.ready isntead. v3: Add helper function to run ring test and set sched.ready flag status accordingly, clean explicit sched.ready sets from the IP specific files. v4: Add kerneldoc and rebase. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Reverse the sequence of ctx_mgr_finiRex Zhu2018-11-051-1/+1
| | | | | | | | | | | | | and vm_fini in amdgpu_driver_postclose_kms csa buffer will be created per ctx, when ctx fini, the csa buffer and va will be released. so need to do ctx_mgr fin before vm fini. Reviewed-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: added AMD GPU instance counting V2Evan Quan2018-10-091-0/+52
| | | | | | | | | | | | Count all GPU instances from AMD(including iGPUs and dGPUs) in the system. V2: drop unnecessary initialization for other gpu_info members except mutex Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: fix up GDS/GWS/OA shiftingChristian König2018-09-191-7/+7
| | | | | | | | | That only worked by pure coincident. Completely remove the shifting and always apply correct PAGE_SHIFT. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Add DMCU to firmware query interfaceDavid Francis2018-09-141-0/+12
| | | | | | | | | DMCU firmware version can be read using the AMDGPU_INFO ioctl or the amdgpu_firmware_info debugfs entry Signed-off-by: David Francis <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: use IP presence to free uvd and vce handlesAlex Deucher2018-09-141-2/+2
| | | | | | | | Rather than checking the asic type, check whether the UVD or VCE IP blocks exist. This way we don't have to update the check with new asics that use VCN. Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add picasso for amdgpu kmsLikun Gao2018-09-141-1/+1
| | | | | | | | | Add picasso for amdgpu kms Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: correctly sign extend 48bit addresses v3Christian König2018-09-111-4/+4
| | | | | | | | | | | Correct sign extend the GMC addresses to 48bit. v2: sign extending turned out easier than thought. v3: clean up the defines and move them into amdgpu_gmc.h as well Signed-off-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: rework ctx entity creationChristian König2018-08-271-11/+25
| | | | | | | | | | | Use a fixed number of entities for each hardware IP. The number of compute entities is reduced to four, SDMA keeps it two entities and all other engines just expose one entity. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: cleanup HW_IP queryChristian König2018-08-271-94/+110
| | | | | | | | Move the code into a separate function. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: fix VM size reporting on RavenChristian König2018-08-271-1/+2
| | | | | | | | | | Raven doesn't have an VCE block and so also no buggy VCE firmware. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: move display definitions into amdgpu_display headerHuang Rui2018-08-271-0/+1
| | | | | | | | Demangle amdgpu.h. Signed-off-by: Huang Rui <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: move gem definitions into amdgpu_gem headerHuang Rui2018-08-271-0/+1
| | | | | | | | Demangle amdgpu.h. Signed-off-by: Huang Rui <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: nuke amdgpu_bo_list_freeChristian König2018-07-311-1/+1
| | | | | | | | | | The RCU grace period is harmless and avoiding it is not worth the effort of doubling the implementation. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: implement harvesting support for UVD 7.2 (v3)Alex Deucher2018-07-271-5/+12
| | | | | | | | | | | Properly handle cases where one or more instance of the IP block may be harvested. v2: make sure ip_num_rings is initialized amdgpu_queue_mgr.c v3: rebase on Christian's UVD changes, drop unused var Reviewed-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: expose only the first UVD instance for nowChristian König2018-07-251-8/+5
| | | | | | | | | | Going to completely rework the context to ring mapping with Nayan's GSoC work, but for now just stopping to expose the second UVD instance should do it. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: clean up coding style a bitChristian König2018-07-251-10/+10
| | | | | | | | No need to bitcast a boolean and even if we should use "!!" instead. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Make pin_size values atomicMichel Dänzer2018-07-131-11/+11
| | | | | | | | | | | | | | Concurrent execution of the non-atomic arithmetic could result in completely bogus values. v2: * Rebased on v2 of the previous patch Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/106872 Reviewed-by: Christian König <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Keep track of amount of pinned CPU visible VRAMMichel Dänzer2018-07-131-3/+2
| | | | | | | | | | | | | | | Instead of CPU invisible VRAM. Preparation for the following, no functional change intended. v2: * Also change amdgpu_vram_mgr_bo_invisible_size to amdgpu_vram_mgr_bo_visible_size, allowing further simplification (Christian König) Cc: [email protected] Reviewed-by: Christian König <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: update ib_start/size_alignment same as windows usedChunming Zhou2018-06-191-14/+14
| | | | | | | | | | | PAGE_SIZE for start_alignment is far much than hw requirement, And now, update to expereince value from window side. Signed-off-by: Chunming Zhou <[email protected]> Acked-by: Marek Olšák <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add AMDGPU_HW_IP_VCN_JPEG to info queryBoyuan Zhang2018-06-151-0/+7
| | | | | | | | Add AMDGPU_HW_IP_VCN_JPEG to info query Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: move amdgpu_ctx_mgr_entity_fini to f_ops flush hook (V4)Andrey Grodzovsky2018-06-151-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With this we can now terminate jobs enqueue into SW queue the moment the task is being killed instead of waiting for last user of drm file to release it. Also stop checking for kref_read(&ctx->refcount) == 1 when calling drm_sched_entity_do_release since other task might still hold a reference to this entity but we don't care since KILL means terminate job submission regardless of what other tasks are doing. v2: Use returned remaining timeout as parameter for the next call. Rebase. v3: Switch to working with jiffies. Streamline remainder TO usage. Rebase. v4: Rebase. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu/vg20:Restruct uvd.inst to support multiple instancesJames Zhu2018-05-181-4/+8
| | | | | | | | | | | Vega20 has dual-UVD. Need add multiple instances support for uvd. Restruct uvd.inst, using uvd.inst[0] to replace uvd.inst->. Repurpose amdgpu_ring::me for instance index, and initialize to 0. There are no any logical changes here. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu/vg20:Restruct uvd to support multiple uvdsJames Zhu2018-05-181-2/+2
| | | | | | | | | Vega20 has dual-UVD. Need Restruct amdgpu_device::uvd to support multiple uvds. There are no any logical changes here. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add save restore list cntl gpm and srm firmware supportHuang Rui2018-05-151-0/+36
| | | | | | | | | | RLC save/restore list cntl/gpm_mem/srm_mem ucodes are used for CGPG and gfxoff function. Signed-off-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: print the vbios version in the debugfs firmware infoAlex Deucher2018-05-151-0/+5
| | | | | | | | Useful for info gathering about what firmwares are in use in the driver. Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: defer test IBs on the rings at boot (V3)Shirish S2018-05-151-0/+3
| | | | | | | | | | | | | | | | amdgpu_ib_ring_tests() runs test IB's on rings at boot contributes to ~500 ms of amdgpu driver's boot time. This patch defers it and ensures that its executed in amdgpu_info_ioctl() if it wasn't scheduled. V2: Use queue_delayed_work() & flush_delayed_work(). V3: removed usage of separate wq, ensure ib tests is run before enabling clockgating. Signed-off-by: Shirish S <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/pp: Remove struct pp_gpu_powerRex Zhu2018-05-151-5/+2
| | | | | | | | | | | | | | | | Currently smu only calculate average gpu power in real time. for vddc/vddci/max power, User need to set start time and end time, firmware can calculate the average vddc/vddci/max power. but the type of return values is not unified. For Vi, return type is uint. For vega, return type is float. so this struct can't be suitable for all asics. Acked-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/gpu-sched: fix force APP kill hang(v4)Emily Deng2018-05-151-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | issue: there are VMC page fault occurred if force APP kill during 3dmark test, the cause is in entity_fini we manually signal all those jobs in entity's queue which confuse the sync/dep mechanism: 1)page fault occurred in sdma's clear job which operate on shadow buffer, and shadow buffer's Gart table is cleaned by ttm_bo_release since the fence in its reservation was fake signaled by entity_fini() under the case of SIGKILL received. 2)page fault occurred in gfx' job because during the lifetime of gfx job we manually fake signal all jobs from its entity in entity_fini(), thus the unmapping/clear PTE job depend on those result fence is satisfied and sdma start clearing the PTE and lead to GFX page fault. fix: 1)should at least wait all jobs already scheduled complete in entity_fini() if SIGKILL is the case. 2)if a fence signaled and try to clear some entity's dependency, should set this entity guilty to prevent its job really run since the dependency is fake signaled. v2: splitting drm_sched_entity_fini() into two functions: 1)The first one is does the waiting, removes the entity from the runqueue and returns an error when the process was killed. 2)The second one then goes over the entity, install it as completion signal for the remaining jobs and signals all jobs with an error code. v3: 1)Replace the fini1 and fini2 with better name 2)Call the first part before the VM teardown in amdgpu_driver_postclose_kms() and the second part after the VM teardown 3)Keep the original function drm_sched_entity_fini to refine the code. v4: 1)Rename entity->finished to entity->last_scheduled; 2)Rename drm_sched_entity_fini_job_cb() to drm_sched_entity_kill_jobs_cb(); 3)Pass NULL to drm_sched_entity_fini_job_cb() if -ENOENT; 4)Replace the type of entity->fini_status with "int"; 5)Remove the check about entity->finished. Signed-off-by: Monk Liu <[email protected]> Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Use dpm_enabled as dpm state flagRex Zhu2018-04-111-1/+1
| | | | | | | | | | | driver will set dpm_enabled to true only when module parameter amdgpu_dpm not equal to 0 and smu hw initialize successfully. Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: add VCN to firmware query interfaceAlex Deucher2018-03-211-0/+12
| | | | | | | | | Need to be able to query the VCN firmware version from userspace to determine supported features, etc. Reviewed-by: Huang Rui <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: limit the VM address space with older VCE FW versionsChristian König2018-02-191-0/+5
| | | | | | | | | | | | Older VCE FW versions are buggy and can't work with 48bit address spaces. RFC: Should we limit the address space or just reject loading the older VCE firmware? Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: apply top reserved VA space to pre Vega10 as wellChristian König2018-02-191-1/+1
| | | | | | | | | Reserve VA space at the top for older generations as well. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Acked-by: Monk Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: rename amdgpu_crtc_idx_to_irq_typeSamuel Li2018-02-191-2/+2
| | | | | | | | | Add display to the name for consistency. Signed-off-by: Samuel Li <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
generated by cgit (git 2.51.2) at 2025-12-01 12:41:42 +0000