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path: root/drivers/spi/spi-bcm2835.c
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Diffstat (limited to 'drivers/spi/spi-bcm2835.c')
-rw-r--r--drivers/spi/spi-bcm2835.c32
1 files changed, 17 insertions, 15 deletions
diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c
index 77de5a07639a..d4e267ebd734 100644
--- a/drivers/spi/spi-bcm2835.c
+++ b/drivers/spi/spi-bcm2835.c
@@ -119,6 +119,7 @@ MODULE_PARM_DESC(polling_limit_us,
*/
struct bcm2835_spi {
void __iomem *regs;
+ phys_addr_t phys_addr;
struct clk *clk;
struct gpio_desc *cs_gpio;
unsigned long clk_hz;
@@ -891,19 +892,8 @@ static int bcm2835_dma_init(struct spi_controller *ctlr, struct device *dev,
struct bcm2835_spi *bs)
{
struct dma_slave_config slave_config;
- const __be32 *addr;
- dma_addr_t dma_reg_base;
int ret;
- /* base address in dma-space */
- addr = of_get_address(ctlr->dev.of_node, 0, NULL, NULL);
- if (!addr) {
- dev_err(dev, "could not get DMA-register address - not using dma mode\n");
- /* Fall back to interrupt mode */
- return 0;
- }
- dma_reg_base = be32_to_cpup(addr);
-
/* get tx/rx dma */
ctlr->dma_tx = dma_request_chan(dev, "tx");
if (IS_ERR(ctlr->dma_tx)) {
@@ -925,7 +915,7 @@ static int bcm2835_dma_init(struct spi_controller *ctlr, struct device *dev,
* or, in case of an RX-only transfer, cyclically copies from the zero
* page to the FIFO using a preallocated, reusable descriptor.
*/
- slave_config.dst_addr = (u32)(dma_reg_base + BCM2835_SPI_FIFO);
+ slave_config.dst_addr = bs->phys_addr + BCM2835_SPI_FIFO;
slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
ret = dmaengine_slave_config(ctlr->dma_tx, &slave_config);
@@ -964,9 +954,9 @@ static int bcm2835_dma_init(struct spi_controller *ctlr, struct device *dev,
* RX FIFO or, in case of a TX-only transfer, cyclically writes a
* precalculated value to the CS register to clear the RX FIFO.
*/
- slave_config.src_addr = (u32)(dma_reg_base + BCM2835_SPI_FIFO);
+ slave_config.src_addr = bs->phys_addr + BCM2835_SPI_FIFO;
slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
- slave_config.dst_addr = (u32)(dma_reg_base + BCM2835_SPI_CS);
+ slave_config.dst_addr = bs->phys_addr + BCM2835_SPI_CS;
slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
ret = dmaengine_slave_config(ctlr->dma_rx, &slave_config);
@@ -1059,6 +1049,16 @@ static int bcm2835_spi_transfer_one(struct spi_controller *ctlr,
unsigned long hz_per_byte, byte_limit;
u32 cs = target->prepare_cs;
+ if (unlikely(!tfr->len)) {
+ static int warned;
+
+ if (!warned)
+ dev_warn(&spi->dev,
+ "zero-length SPI transfer ignored\n");
+ warned = 1;
+ return 0;
+ }
+
/* set clock */
spi_hz = tfr->speed_hz;
@@ -1350,6 +1350,7 @@ static int bcm2835_spi_probe(struct platform_device *pdev)
{
struct spi_controller *ctlr;
struct bcm2835_spi *bs;
+ struct resource *iomem;
int err;
ctlr = devm_spi_alloc_host(&pdev->dev, sizeof(*bs));
@@ -1373,10 +1374,11 @@ static int bcm2835_spi_probe(struct platform_device *pdev)
bs = spi_controller_get_devdata(ctlr);
bs->ctlr = ctlr;
- bs->regs = devm_platform_ioremap_resource(pdev, 0);
+ bs->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &iomem);
if (IS_ERR(bs->regs))
return PTR_ERR(bs->regs);
+ bs->phys_addr = iomem->start;
bs->clk = devm_clk_get_enabled(&pdev->dev, NULL);
if (IS_ERR(bs->clk))
return dev_err_probe(&pdev->dev, PTR_ERR(bs->clk),