diff options
Diffstat (limited to 'drivers/gpu/drm/amd/include')
5 files changed, 14 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/include/amd_acpi.h b/drivers/gpu/drm/amd/include/amd_acpi.h index 2d089d30518f..06badbf0c5b9 100644 --- a/drivers/gpu/drm/amd/include/amd_acpi.h +++ b/drivers/gpu/drm/amd/include/amd_acpi.h @@ -61,7 +61,7 @@ struct atif_qbtc_arguments { struct atif_qbtc_data_point { u8 luminance; /* luminance in percent */ - u8 ipnut_signal; /* input signal in range 0-255 */ + u8 input_signal; /* input signal in range 0-255 */ } __packed; struct atif_qbtc_output { @@ -75,6 +75,8 @@ struct atif_qbtc_output { u8 number_of_points; /* number of data points */ struct atif_qbtc_data_point data_points[ATIF_QBTC_MAX_DATA_POINTS]; } __packed; +static_assert(ATIF_QBTC_MAX_DATA_POINTS == MAX_LUMINANCE_DATA_POINTS); +static_assert(sizeof(struct atif_qbtc_data_point) == sizeof(struct amdgpu_dm_luminance_data)); #define ATIF_NOTIFY_MASK 0x3 #define ATIF_NOTIFY_NONE 0 diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h index 3e86865563dc..485b713cfad0 100644 --- a/drivers/gpu/drm/amd/include/amd_shared.h +++ b/drivers/gpu/drm/amd/include/amd_shared.h @@ -354,6 +354,10 @@ enum DC_DEBUG_MASK { * @DC_DISABLE_SUBVP: If set, disable DCN Sub-Viewport feature in amdgpu driver. */ DC_DISABLE_SUBVP = 0x20000, + /** + * @DC_DISABLE_CUSTOM_BRIGHTNESS_CURVE: If set, disable support for custom brightness curves + */ + DC_DISABLE_CUSTOM_BRIGHTNESS_CURVE = 0x40000, }; enum amd_dpm_forced_level; @@ -405,7 +409,7 @@ struct amd_ip_funcs { int (*prepare_suspend)(struct amdgpu_ip_block *ip_block); int (*suspend)(struct amdgpu_ip_block *ip_block); int (*resume)(struct amdgpu_ip_block *ip_block); - bool (*is_idle)(void *handle); + bool (*is_idle)(struct amdgpu_ip_block *ip_block); int (*wait_for_idle)(struct amdgpu_ip_block *ip_block); bool (*check_soft_reset)(struct amdgpu_ip_block *ip_block); int (*pre_soft_reset)(struct amdgpu_ip_block *ip_block); diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h index abdb8728156e..d6c02cf815be 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h +++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h @@ -9478,6 +9478,8 @@ #define regRLC_GFX_IMU_CMD_BASE_IDX 1 #define regGFX_IMU_RLC_STATUS 0x4054 #define regGFX_IMU_RLC_STATUS_BASE_IDX 1 +#define regGFX_IMU_STATUS 0x4055 +#define regGFX_IMU_STATUS_BASE_IDX 1 #define regGFX_IMU_SOC_DATA 0x4059 #define regGFX_IMU_SOC_DATA_BASE_IDX 1 #define regGFX_IMU_SOC_ADDR 0x405a diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h index 2bd9f3f1026f..0122a21c50cf 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h +++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h @@ -2261,11 +2261,13 @@ #define SH_MEM_CONFIG__ADDRESS_MODE__SHIFT 0x0 #define SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT 0x3 #define SH_MEM_CONFIG__F8_MODE__SHIFT 0x8 +#define SH_MEM_CONFIG__PRECISION_MODE__SHIFT 0x9 #define SH_MEM_CONFIG__RETRY_DISABLE__SHIFT 0xc #define SH_MEM_CONFIG__PRIVATE_NV__SHIFT 0xd #define SH_MEM_CONFIG__ADDRESS_MODE_MASK 0x00000001L #define SH_MEM_CONFIG__ALIGNMENT_MODE_MASK 0x00000018L #define SH_MEM_CONFIG__F8_MODE_MASK 0x00000100L +#define SH_MEM_CONFIG__PRECISION_MODE_MASK 0x00000200L #define SH_MEM_CONFIG__RETRY_DISABLE_MASK 0x00001000L #define SH_MEM_CONFIG__PRIVATE_NV_MASK 0x00002000L //SP_MFMA_PORTD_RD_CONFIG diff --git a/drivers/gpu/drm/amd/include/kgd_kfd_interface.h b/drivers/gpu/drm/amd/include/kgd_kfd_interface.h index e3e635a31b8a..1e8dfa6c0dc8 100644 --- a/drivers/gpu/drm/amd/include/kgd_kfd_interface.h +++ b/drivers/gpu/drm/amd/include/kgd_kfd_interface.h @@ -330,6 +330,8 @@ struct kfd2kgd_calls { uint64_t (*hqd_reset)(struct amdgpu_device *adev, uint32_t pipe_id, uint32_t queue_id, uint32_t inst, unsigned int utimeout); + uint32_t (*hqd_sdma_get_doorbell)(struct amdgpu_device *adev, + int engine, int queue); }; #endif /* KGD_KFD_INTERFACE_H_INCLUDED */ |