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| author | Xingyu Wu <[email protected]> | 2023-07-17 02:30:34 +0000 |
|---|---|---|
| committer | Conor Dooley <[email protected]> | 2023-07-19 17:07:48 +0000 |
| commit | bd348ca24d81cca2a27f8ffa12adc8f30f184275 (patch) | |
| tree | c70d6233857bc91f11f4b3ef10cabb76bcea8e28 /tools/perf/scripts/python | |
| parent | Linux 6.5-rc1 (diff) | |
| download | kernel-bd348ca24d81cca2a27f8ffa12adc8f30f184275.tar.gz kernel-bd348ca24d81cca2a27f8ffa12adc8f30f184275.zip | |
dt-bindings: clock: Add StarFive JH7110 PLL clock generator
Add bindings for the PLL clock generator on the JH7110 RISC-V SoC.
Reviewed-by: Conor Dooley <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Xingyu Wu <[email protected]>
Reviewed-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions