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| author | Gabor Juhos <[email protected]> | 2025-07-02 12:35:24 +0000 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2025-07-02 16:02:43 +0000 |
| commit | 913bf8d50cbd144c87e9660b591781179182ff59 (patch) | |
| tree | 54003fe74e3b1b4e7e536ede9359f8effcbe7965 /tools/perf/scripts/python | |
| parent | mtd: nand: qpic-common: add defines for ECC_MODE values (diff) | |
| download | kernel-913bf8d50cbd144c87e9660b591781179182ff59.tar.gz kernel-913bf8d50cbd144c87e9660b591781179182ff59.zip | |
spi: spi-qpic-snand: add support for 8 bits ECC strength
Even though the hardware supports 8 bits ECC strength, but that is not
handled in the driver yet. This change adds the missing bits in order
to allow using the driver with chips which require 8 bits ECC strength.
No functional changes intended with regard to the existing 4 bits ECC
strength support.
Tested on an IPQ9574 platform using a GigaDevice GD5F2GM7REYIG chip.
Signed-off-by: Gabor Juhos <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions