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| author | Manikanta Maddireddy <[email protected]> | 2019-06-18 18:01:58 +0000 |
|---|---|---|
| committer | Lorenzo Pieralisi <[email protected]> | 2019-06-20 16:40:48 +0000 |
| commit | c894121d014260af3fd199e1d2a56d4af5ff8ba9 (patch) | |
| tree | 12bd14e4e0410cc18b9ddfeafcddbe58a400718c /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | PCI: tegra: Program AFI_CACHE_BAR_{0,1}_{ST,SZ} registers only for Tegra20 (diff) | |
| download | kernel-c894121d014260af3fd199e1d2a56d4af5ff8ba9.tar.gz kernel-c894121d014260af3fd199e1d2a56d4af5ff8ba9.zip | |
PCI: tegra: Change PRSNT_SENSE IRQ log to debug
PRSNT_MAP bit field is programmed to update the slot present status.
PRSNT_SENSE IRQ is triggered when this bit field is programmed, which is
not an error. Add a new if condition to trap PRSNT_SENSE code and print
it with debug log level.
Signed-off-by: Manikanta Maddireddy <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Acked-by: Thierry Reding <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions