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authorAlberto Panizzo <[email protected]>2018-07-06 13:18:51 +0000
committerHeiko Stuebner <[email protected]>2018-07-07 22:19:19 +0000
commita64ad008980c65d38e6cf6858429c78e6b740c41 (patch)
tree2a01e321c68fceb9992be82b9efb1bf767d84c99 /tools/perf/scripts/python/event_analyzing_sample.py
parentclk: rockchip: add clock controller for px30 (diff)
downloadkernel-a64ad008980c65d38e6cf6858429c78e6b740c41.tar.gz
kernel-a64ad008980c65d38e6cf6858429c78e6b740c41.zip
clk: rockchip: fix clk_i2sout parent selection bits on rk3399
Register, shift and mask were wrong according to datasheet. Fixes: 115510053e5e ("clk: rockchip: add clock controller for the RK3399") Cc: [email protected] Signed-off-by: Alberto Panizzo <[email protected]> Signed-off-by: Anthony Brandon <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]>
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