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| author | Dave Jiang <[email protected]> | 2023-02-14 17:00:24 +0000 |
|---|---|---|
| committer | Dan Williams <[email protected]> | 2023-02-14 22:12:54 +0000 |
| commit | 248529edc86f8d7d390a15a86bd1904951311665 (patch) | |
| tree | 0eb11c11d179bca096a9c8539a3dd02bbe39c1d3 /tools/perf/scripts/python/arm-cs-trace-disasm.py | |
| parent | cxl: remove unnecessary calling of pci_enable_pcie_error_reporting() (diff) | |
| download | kernel-248529edc86f8d7d390a15a86bd1904951311665.tar.gz kernel-248529edc86f8d7d390a15a86bd1904951311665.zip | |
cxl: add RAS status unmasking for CXL
By default the CXL RAS mask registers bits are defaulted to 1's and
suppress all error reporting. If the kernel has negotiated ownership
of error handling for CXL then unmask the mask registers by writing 0s.
PCI_EXP_DEVCTL capability is checked to see uncorrectable or correctable
errors bits are set before unmasking the respective errors.
Acked-by: Bjorn Helgaas <[email protected]> # pci_regs.h
Reviewed-by: Jonathan Cameron <[email protected]>
Signed-off-by: Jonathan Cameron <[email protected]>
Signed-off-by: Dave Jiang <[email protected]>
Link: https://lore.kernel.org/r/167639402301.778884.12556849214955646539.stgit@djiang5-mobl3.local
Signed-off-by: Dan Williams <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/arm-cs-trace-disasm.py')
0 files changed, 0 insertions, 0 deletions