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authorLeonardo Bras <[email protected]>2024-01-03 16:32:02 +0000
committerPalmer Dabbelt <[email protected]>2024-04-08 17:52:05 +0000
commit54280ca64626f73ce39ba8f7befa9139a6786ffd (patch)
tree385b3bd7e68255b7675876a043eb29b5dcce2c3f /scripts/generate_rust_target.rs
parentriscv/atomic.h : Deduplicate arch_atomic.* (diff)
downloadkernel-54280ca64626f73ce39ba8f7befa9139a6786ffd.tar.gz
kernel-54280ca64626f73ce39ba8f7befa9139a6786ffd.zip
riscv/cmpxchg: Implement cmpxchg for variables of size 1 and 2
cmpxchg for variables of size 1-byte and 2-bytes is not yet available for riscv, even though its present in other architectures such as arm64 and x86. This could lead to not being able to implement some locking mechanisms or requiring some rework to make it work properly. Implement 1-byte and 2-bytes cmpxchg in order to achieve parity with other architectures. Signed-off-by: Leonardo Bras <[email protected]> Tested-by: Guo Ren <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
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