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authorEric Chan <[email protected]>2024-02-17 13:13:02 +0000
committerPalmer Dabbelt <[email protected]>2024-03-20 01:52:23 +0000
commitb3c8064ccc447be45a3bdc2c4a9ea0491f011920 (patch)
tree1b3c8d45dbac207efd5bde0a529fe1a41410539b /scripts/bpf_doc.py
parentriscv/barrier: Define __{mb,rmb,wmb} (diff)
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riscv/barrier: Define RISCV_FULL_BARRIER
Introduce RISCV_FULL_BARRIER and use in arch_atomic* function. like RISCV_ACQUIRE_BARRIER and RISCV_RELEASE_BARRIER, the fence instruction can be eliminated When SMP is not enabled. Signed-off-by: Eric Chan <[email protected]> Reviewed-by: Andrea Parri <[email protected]> Reviewed-by: Samuel Holland <[email protected]> Tested-by: Samuel Holland <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
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