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authorAlexandre Ghiti <[email protected]>2025-03-17 07:25:51 +0000
committerAlexandre Ghiti <[email protected]>2025-04-01 07:03:03 +0000
commit83d78ac677b9fdd8ea763507c6fe02d6bf415f3a (patch)
tree4bb7ae78dd8786289d205070653c3ce4465f6c08 /rust/helpers/workqueue.c
parentriscv: print hartid on bringup (diff)
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riscv: Fix hugetlb retrieval of number of ptes in case of !present pte
Ryan sent a fix [1] for arm64 that applies to riscv too: in some hugetlb functions, we must not use the pte value to get the size of a mapping because the pte may not be present. So use the already present size parameter for huge_pte_clear() and the newly introduced size parameter for huge_ptep_get_and_clear(). And make sure to gather A/D bits only on present ptes. Fixes: 82a1a1f3bfb6 ("riscv: mm: support Svnapot in hugetlb page") Link: https://lore.kernel.org/all/[email protected]/ [1] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Alexandre Ghiti <[email protected]>
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