dt-bindings: clock: thead: Add TH1520 VO clock controller

Add device tree bindings for the TH1520 Video Output (VO) subsystem
clock controller. The VO sub-system manages clock gates for multimedia
components including HDMI, MIPI, and GPU.

Document the VIDEO_PLL requirements for the VO clock controller, which
receives its input from the AP clock controller. The VIDEO_PLL is a
Silicon Creations Sigma-Delta (integer) PLL typically running at 792 MHz
with maximum FOUTVCO of 2376 MHz.

This binding complements the existing AP sub-system clock controller
which manages CPU, DPU, GMAC and TEE PLLs.

Reviewed-by: Krzysztof Kozlowski <[email protected]>
Acked-by: Conor Dooley <[email protected]>
Signed-off-by: Michal Wilczynski <[email protected]>
Reviewed-by: Drew Fustini <[email protected]>
Signed-off-by: Drew Fustini <[email protected]>

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