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| author | Fabrice Gasnier <[email protected]> | 2025-02-24 17:06:57 +0000 |
|---|---|---|
| committer | William Breathitt Gray <[email protected]> | 2025-03-04 10:23:02 +0000 |
| commit | 8744dcd4fc7800de2eb9369410470bb2930d4c14 (patch) | |
| tree | 5d7870b02c72dffdcaa1b7c1e5a63f0e5fd6cab6 /net/unix/sysctl_net_unix.c | |
| parent | Linux 6.14-rc1 (diff) | |
| download | kernel-8744dcd4fc7800de2eb9369410470bb2930d4c14.tar.gz kernel-8744dcd4fc7800de2eb9369410470bb2930d4c14.zip | |
counter: stm32-lptimer-cnt: fix error handling when enabling
In case the stm32_lptim_set_enable_state() fails to update CMP and ARR,
a timeout error is raised, by regmap_read_poll_timeout. It may happen,
when the lptimer runs on a slow clock, and the clock is gated only
few times during the polling.
Badly, when this happen, STM32_LPTIM_ENABLE in CR register has been set.
So the 'enable' state in sysfs wrongly lies on the counter being
correctly enabled, due to CR is read as one in stm32_lptim_is_enabled().
To fix both issues:
- enable the clock before writing CMP, ARR and polling ISR bits. It will
avoid the possible timeout error.
- clear the ENABLE bit in CR and disable the clock in the error path.
Fixes: d8958824cf07 ("iio: counter: Add support for STM32 LPTimer")
Signed-off-by: Fabrice Gasnier <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: William Breathitt Gray <[email protected]>
Diffstat (limited to 'net/unix/sysctl_net_unix.c')
0 files changed, 0 insertions, 0 deletions