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| author | Lad Prabhakar <[email protected]> | 2025-01-02 18:18:38 +0000 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2025-01-07 16:00:56 +0000 |
| commit | 7e3557b4dd929aee5961417575893a990650e84e (patch) | |
| tree | fcefda83925b9038b03691993948b4f5daa8f301 /net/unix/sysctl_net_unix.c | |
| parent | clk: renesas: r8a779g0: Add VSPX clocks (diff) | |
| download | kernel-7e3557b4dd929aee5961417575893a990650e84e.tar.gz kernel-7e3557b4dd929aee5961417575893a990650e84e.zip | |
clk: renesas: r9a09g057: Add reset entry for SYS
Add the missing reset entry for the `SYS` module in the clock driver. The
corresponding core clock entry for `SYS` is already present.
Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>
Diffstat (limited to 'net/unix/sysctl_net_unix.c')
0 files changed, 0 insertions, 0 deletions