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authorDave Airlie <[email protected]>2025-02-21 00:50:28 +0000
committerDave Airlie <[email protected]>2025-02-21 00:50:29 +0000
commit9a1cd7d6df5d708ef244f93715855c8e54d79448 (patch)
tree61b1db1184b5c70d956720e5055d65d4ddad45fc /net/unix/garbage.c
parentMerge tag 'drm-intel-fixes-2025-02-20' of https://gitlab.freedesktop.org/drm/... (diff)
parentdrm/msm/dsi/phy: Do not overwite PHY_CMN_CLK_CFG1 when choosing bitclk source (diff)
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Merge tag 'drm-msm-fixes-2025-02-20' of https://gitlab.freedesktop.org/drm/msm into drm-fixes
Fixes for v6.14-rc4 Display: * More catalog fixes: - to skip watchdog programming through top block if its not present - fix the setting of WB mask to ensure the WB input control is programmed correctly through ping-pong - drop lm_pair for sm6150 as that chipset does not have any 3dmerge block * Fix the mode validation logic for DP/eDP to account for widebus (2ppc) to allow high clock resolutions * Fix to disable dither during encoder disable as otherwise this was causing kms_writeback failure due to resource sharing between * WB and DSI paths as DSI uses dither but WB does not * Fixes for virtual planes, namely to drop extraneous return and fix uninitialized variables * Fix to avoid spill-over of DSC encoder block bits when programming the bits-per-component * Fixes in the DSI PHY to protect against concurrent access of PHY_CMN_CLK_CFG regs between clock and display drivers Core/GPU: * Fix non-blocking fence wait incorrectly rounding up to 1 jiffy timeout * Only print GMU fw version once, instead of each time the GPU resumes Signed-off-by: Dave Airlie <[email protected]> From: Rob Clark <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGtt2AODBXdod8ULXcAygf_qYvwRDVeUVtODx=2jErp6cA@mail.gmail.com
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