diff options
| author | Ronak Doshi <[email protected]> | 2022-06-08 03:23:49 +0000 |
|---|---|---|
| committer | Paolo Abeni <[email protected]> | 2022-06-09 10:42:01 +0000 |
| commit | 2c5a5748105a6bb901579d365c6f93e79f282b69 (patch) | |
| tree | 5fcfd8fb5e8d20181ad2531c10ac8a7883934862 /net/switchdev | |
| parent | vmxnet3: add support for large passthrough BAR register (diff) | |
| download | kernel-2c5a5748105a6bb901579d365c6f93e79f282b69.tar.gz kernel-2c5a5748105a6bb901579d365c6f93e79f282b69.zip | |
vmxnet3: add support for out of order rx completion
Currently, vmxnet3 processes rx completions in-order i.e. no
out of order completion descriptor is expected. With UPT, if
hardware supports LRO, then hardware can report out of order
rx completions. This patch enhances vmxnet3 to add this support.
This supports gets effective only when the corresponding feature
bit is set.
Also, minor enhancements are done for performance.
Signed-off-by: Ronak Doshi <[email protected]>
Acked-by: Guolin Yang <[email protected]>
Signed-off-by: Paolo Abeni <[email protected]>
Diffstat (limited to 'net/switchdev')
0 files changed, 0 insertions, 0 deletions