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| author | Biju Das <[email protected]> | 2024-12-16 19:53:12 +0000 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2025-01-03 20:04:44 +0000 |
| commit | 5c7fb203d0dbfbfeed51991a4f98499b245634a7 (patch) | |
| tree | 6c091335d31fc2a577d40a67f3789e8f484ba70a /net/switchdev/switchdev.c | |
| parent | dt-bindings: clock: renesas: Document RZ/G3E SoC CPG (diff) | |
| download | kernel-5c7fb203d0dbfbfeed51991a4f98499b245634a7.tar.gz kernel-5c7fb203d0dbfbfeed51991a4f98499b245634a7.zip | |
dt-bindings: pinctrl: renesas: Document RZ/G3E SoC
Add documentation for the pin controller found on the Renesas RZ/G3E
(R9A09G047) SoC. The RZ/G3E PFC is similar to the RZ/V2H SoC but has more
pins(P00-PS3).
Acked-by: Conor Dooley <[email protected]>
Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>
Diffstat (limited to 'net/switchdev/switchdev.c')
0 files changed, 0 insertions, 0 deletions