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authorJitao Shi <[email protected]>2019-12-13 09:52:15 +0000
committerCK Hu <[email protected]>2019-12-17 02:23:43 +0000
commite18e0f6b7c8f220774dd68965e8a9b046905acc8 (patch)
tree845c4a9f8fdef303c4d0784e32c5c120703cef92 /lib/xarray.c
parentdrm/mediatek: Fix can't get component for external display plane. (diff)
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drm/mediatek: reduce the hbp and hfp for phy timing
There are some extra data transfer in dsi. ex. LPX, hs_prepare, hs_zero, hs_exit and the sof/eof of dsi packet. This signal will enlarge the line time. So the real frame on dsi bus will be lower than calc by video timing. So dsi driver reduces the hbp and hfp to keep the line time. Fixes: 7a5bc4e22ecf ("drm/mediatek: change the dsi phytiming calculate method") Signed-off-by: Jitao Shi <[email protected]> Tested-by: Hsin-Yi Wang <[email protected]> Tested-by: Enric Balletbo i Serra <[email protected]> Signed-off-by: CK Hu <[email protected]>
Diffstat (limited to 'lib/xarray.c')
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