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| author | Axel Lin <[email protected]> | 2012-03-22 22:27:10 +0000 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2012-03-26 17:35:35 +0000 |
| commit | 9300928692f835f76f5604b3b51c3085977edf68 (patch) | |
| tree | 293d6acf7b14b978677fe9f3c41c76a2d0bafd85 /lib/mpi/mpi-inline.h | |
| parent | regulator: Fix restoring pmic.dcdcx_hib_mode settings in wm8350_dcdc_set_susp... (diff) | |
| download | kernel-9300928692f835f76f5604b3b51c3085977edf68.tar.gz kernel-9300928692f835f76f5604b3b51c3085977edf68.zip | |
regulator: Do proper shift to set correct bit for DC[2|5]_HIB_MODE setting
DC[2|5]_HIB_MODE is BIT 12 of DCDC[2|5] Control register.
WM8350_DC2_HIB_MODE_ACTIVE/WM8350_DC2_HIB_MODE_DISABLE are defined as 1/0.
Thus we need to left shift WM8350_DC2_HIB_MODE_SHIFT bits.
Signed-off-by: Axel Lin <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'lib/mpi/mpi-inline.h')
0 files changed, 0 insertions, 0 deletions