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| author | Stephen Boyd <[email protected]> | 2019-06-14 17:46:06 +0000 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2019-06-17 14:13:54 +0000 |
| commit | c8edb316b9bb6149193436dfbd240994733e27be (patch) | |
| tree | eedfdd9b952a89bacfcca319b9bffbd322d57bb9 /fs/proc/array.c | |
| parent | clk: tegra210: Fix default rates for HDA clocks (diff) | |
| download | kernel-c8edb316b9bb6149193436dfbd240994733e27be.tar.gz kernel-c8edb316b9bb6149193436dfbd240994733e27be.zip | |
clk: Do a DT parent lookup even when index < 0
We want to allow the parent lookup to happen even if the index is some
value less than 0. This may be the case if a clk provider only specifies
the .name member to match a string in the "clock-names" DT property. We
shouldn't require that the index be >= 0 to make this use case work.
Fixes: 601b6e93304a ("clk: Allow parents to be specified via clkspec index")
Reported-by: Alexandre Mergnat <[email protected]>
Cc: Jerome Brunet <[email protected]>
Cc: Chen-Yu Tsai <[email protected]>
Reviewed-by: Chen-Yu Tsai <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'fs/proc/array.c')
0 files changed, 0 insertions, 0 deletions