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| author | Palmer Dabbelt <[email protected]> | 2023-03-09 23:22:05 +0000 |
|---|---|---|
| committer | Palmer Dabbelt <[email protected]> | 2023-03-09 23:22:05 +0000 |
| commit | 9b7fef255c80db8fc33fc06f2ad6d8e3ced1389b (patch) | |
| tree | 1502eff3eb6bb0d198553344e0dac48d64da3cd1 /fs/proc/array.c | |
| parent | RISC-V: Don't check text_mutex during stop_machine (diff) | |
| parent | riscv: asid: Fixup stale TLB entry cause application crash (diff) | |
| download | kernel-9b7fef255c80db8fc33fc06f2ad6d8e3ced1389b.tar.gz kernel-9b7fef255c80db8fc33fc06f2ad6d8e3ced1389b.zip | |
Merge patch series "riscv: asid: switch to alternative way to fix stale TLB entries"
Sergey Matyukevich <[email protected]> says:
Some time ago two different patches have been posted to fix stale TLB
entries that caused applications crashes.
The patch [0] suggested 'aggregating' mm_cpumask, i.e. current cpu is not
cleared for the switched-out task in switch_mm function. For additional
explanations see the commit message by Guo Ren. The same approach is
used by arc architecture, so another good comment is for switch_mm
in arch/arc/include/asm/mmu_context.h.
The patch [1] attempted to reduce the number of TLB flushes by deferring
(and possibly avoiding) them for CPUs not running the task.
Patch [1] has been merged. However we already have two bug reports from
different vendors. So apparently something is missing in the approach
suggested in [1]. In both cases the patch [0] fixed the issue.
This patch series reverts [1] and replaces it by [0].
[0] https://lore.kernel.org/linux-riscv/[email protected]/
[1] https://lore.kernel.org/linux-riscv/[email protected]/
* b4-shazam-merge:
riscv: asid: Fixup stale TLB entry cause application crash
Revert "riscv: mm: notify remote harts about mmu cache updates"
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Palmer Dabbelt <[email protected]>
Diffstat (limited to 'fs/proc/array.c')
0 files changed, 0 insertions, 0 deletions