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| author | Kishon Vijay Abraham I <[email protected]> | 2019-03-25 09:39:46 +0000 |
|---|---|---|
| committer | Lorenzo Pieralisi <[email protected]> | 2019-05-01 14:50:13 +0000 |
| commit | 5bb04b19230c02cc1b450b029856cbe093e09908 (patch) | |
| tree | 0bc6058c786892ee08e1e6f55eb82b7687709634 /drivers/pci/controller/pci-host-common.c | |
| parent | PCI: designware-ep: Use aligned ATU window for raising MSI interrupts (diff) | |
| download | kernel-5bb04b19230c02cc1b450b029856cbe093e09908.tar.gz kernel-5bb04b19230c02cc1b450b029856cbe093e09908.zip | |
misc: pci_endpoint_test: Add support to test PCI EP in AM654x
TI's AM654x PCIe EP has a restriction that BAR_0 is mapped to
application registers. "PCIe Inbound Address Translation" section in
AM65x Sitara Processors TRM (SPRUID7 – April 2018) describes BAR0 as
reserved.
Configure pci_endpoint_test to use BAR_2 instead.
Also set alignment to 64K since "PCIe Subsystem Address Translation"
section in TRM indicates minimum ATU window size is 64K.
Signed-off-by: Kishon Vijay Abraham I <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Diffstat (limited to 'drivers/pci/controller/pci-host-common.c')
0 files changed, 0 insertions, 0 deletions