aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/pci/controller/dwc
diff options
context:
space:
mode:
authorDmitry Baryshkov <[email protected]>2024-10-17 18:04:47 +0000
committerKrzysztof Wilczyński <[email protected]>2024-11-02 14:32:28 +0000
commitd38cc57c14ff9590e03da77987217eca19ea350d (patch)
tree0c9ef1beec54c9ecbb8489d9cbb1354db02a753c /drivers/pci/controller/dwc
parentdt-bindings: PCI: mediatek-gen3: Allow exact number of clocks only (diff)
downloadkernel-d38cc57c14ff9590e03da77987217eca19ea350d.tar.gz
kernel-d38cc57c14ff9590e03da77987217eca19ea350d.zip
dt-bindings: PCI: qcom,pcie-sm8550: Add SAR2130P compatible
On the Qualcomm SAR2130P platform the PCIe host is compatible with the DWC controller present on the SM8550 platorm, just using one additional clock. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]>
Diffstat (limited to 'drivers/pci/controller/dwc')
0 files changed, 0 insertions, 0 deletions