diff options
| author | Rob Herring <[email protected]> | 2020-08-21 03:53:44 +0000 |
|---|---|---|
| committer | Lorenzo Pieralisi <[email protected]> | 2020-09-08 15:36:50 +0000 |
| commit | 27e7ed018113e7b96f13100787ba8c0553a63b81 (patch) | |
| tree | b740430acb2c0221b28427d416bf1e816a5a0899 /drivers/pci/controller/dwc/pcie-designware-host.c | |
| parent | PCI: dwc: Allow overriding bridge pci_ops (diff) | |
| download | kernel-27e7ed018113e7b96f13100787ba8c0553a63b81.tar.gz kernel-27e7ed018113e7b96f13100787ba8c0553a63b81.zip | |
PCI: dwc: Add a default pci_ops.map_bus for root port
The Designware root port config space is memory mapped accesses via the
DBI space by default. Add a common implementation
dw_pcie_own_conf_map_bus() for platforms to use.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Rob Herring <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Cc: Jingoo Han <[email protected]>
Cc: Gustavo Pimentel <[email protected]>
Cc: Lorenzo Pieralisi <[email protected]>
Cc: Bjorn Helgaas <[email protected]>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware-host.c')
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-designware-host.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index b626cc7cd43a..feb3625f7d4d 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -602,6 +602,18 @@ static int dw_pcie_wr_conf(struct pci_bus *bus, u32 devfn, return dw_pcie_wr_other_conf(pp, bus, devfn, where, size, val); } +void __iomem *dw_pcie_own_conf_map_bus(struct pci_bus *bus, unsigned int devfn, int where) +{ + struct pcie_port *pp = bus->sysdata; + struct dw_pcie *pci = to_dw_pcie_from_pp(pp); + + if (PCI_SLOT(devfn) > 0) + return NULL; + + return pci->dbi_base + where; +} +EXPORT_SYMBOL_GPL(dw_pcie_own_conf_map_bus); + static struct pci_ops dw_pcie_ops = { .read = dw_pcie_rd_conf, .write = dw_pcie_wr_conf, |