diff options
| author | Jiaxun Yang <[email protected]> | 2024-06-12 08:54:34 +0000 |
|---|---|---|
| committer | Daniel Lezcano <[email protected]> | 2024-07-12 14:07:05 +0000 |
| commit | 5e4bfd66eccaaab65b3d565cfe28483afeacaf1d (patch) | |
| tree | 9ce75b1664f59f31779677ac0da57b6138763f6e /drivers/net/ethernet/intel/igc/igc_main.c | |
| parent | clocksource/drivers/mips-gic-timer: Refine rating computation (diff) | |
| download | kernel-5e4bfd66eccaaab65b3d565cfe28483afeacaf1d.tar.gz kernel-5e4bfd66eccaaab65b3d565cfe28483afeacaf1d.zip | |
clocksource/drivers/mips-gic-timer: Correct sched_clock width
Counter width of GIC is configurable and can be read from a
register.
Use width value from the register for sched_clock.
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Jiaxun Yang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Daniel Lezcano <[email protected]>
Diffstat (limited to 'drivers/net/ethernet/intel/igc/igc_main.c')
0 files changed, 0 insertions, 0 deletions