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| author | Jungseung Lee <[email protected]> | 2020-03-18 12:06:14 +0000 |
|---|---|---|
| committer | Tudor Ambarus <[email protected]> | 2020-03-24 09:47:42 +0000 |
| commit | 05635c14a292de0e1a221dc31c04aba3913f03c8 (patch) | |
| tree | 0ba072883421d983b78f4d99c381d834093911fb /drivers/mtd/lpddr/lpddr_cmds.c | |
| parent | mtd: spi-nor: Add generic formula for SR block protection handling (diff) | |
| download | kernel-05635c14a292de0e1a221dc31c04aba3913f03c8.tar.gz kernel-05635c14a292de0e1a221dc31c04aba3913f03c8.zip | |
mtd: spi-nor: Add SR 4bit block protection support
Currently we are supporting block protection only for flash chips with
3 block protection bits (BP0-2) in the SR register.
Enable block protection support for flashes with 4 block protection bits
(BP0-3).
Add a flash_info flag for flashes that describe 4 block protection bits.
Add another flash_info flag for flashes in which BP3 bit is not adjacent
to the BP0-2 bits.
Tested with a n25q512ax3 (BP0-3) and w25q128 (BP0-2).
Signed-off-by: Jungseung Lee <[email protected]>
Reviewed-by: Michael Walle <[email protected]>
Tested-by: Michael Walle <[email protected]>
Signed-off-by: Tudor Ambarus <[email protected]>
Diffstat (limited to 'drivers/mtd/lpddr/lpddr_cmds.c')
0 files changed, 0 insertions, 0 deletions