diff options
| author | Jani Nikula <[email protected]> | 2017-04-06 13:44:14 +0000 |
|---|---|---|
| committer | Jani Nikula <[email protected]> | 2017-04-11 13:54:31 +0000 |
| commit | 3d65a735d8341830ef8ec57e290ed785b01085a1 (patch) | |
| tree | f040ba8b65616b77218c0881957bf34a6ba4f26e /drivers/gpu/drm/i915/intel_dp_mst.c | |
| parent | drm/i915/dp: add functions for max common link rate and lane count (diff) | |
| download | kernel-3d65a735d8341830ef8ec57e290ed785b01085a1.tar.gz kernel-3d65a735d8341830ef8ec57e290ed785b01085a1.zip | |
drm/i915/mst: use max link not sink lane count
The source might not support as many lanes as the sink, or the link
training might have failed at higher lane counts. Take these into
account.
Cc: Dhinakaran Pandiyan <[email protected]>
Cc: Manasi Navare <[email protected]>
Cc: Ville Syrjälä <[email protected]>
Reviewed-by: Manasi Navare <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
Link: http://patchwork.freedesktop.org/patch/msgid/cf59530acafaf9258fb643d321ad251b44f34e29.1491485983.git.jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp_mst.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dp_mst.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c index 094cbdcbcd6d..40608101cd3a 100644 --- a/drivers/gpu/drm/i915/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/intel_dp_mst.c @@ -56,7 +56,7 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, * for MST we always configure max link bw - the spec doesn't * seem to suggest we should do otherwise. */ - lane_count = drm_dp_max_lane_count(intel_dp->dpcd); + lane_count = intel_dp_max_lane_count(intel_dp); pipe_config->lane_count = lane_count; @@ -343,7 +343,7 @@ intel_dp_mst_mode_valid(struct drm_connector *connector, int max_rate, mode_rate, max_lanes, max_link_clock; max_link_clock = intel_dp_max_link_rate(intel_dp); - max_lanes = drm_dp_max_lane_count(intel_dp->dpcd); + max_lanes = intel_dp_max_lane_count(intel_dp); max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes); mode_rate = intel_dp_link_required(mode->clock, bpp); |