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| author | Daniel Miess <[email protected]> | 2022-07-19 15:43:28 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2022-08-10 19:11:51 +0000 |
| commit | 9bd110ab06e93fd01938dedd8b6015940418f0fb (patch) | |
| tree | d5232356ef13dfe0c8cf2fa0c9ff85b117be150c /drivers/gpu/drm/amd/display/modules/freesync/freesync.c | |
| parent | drm/amd/display: Add a variable to update FCLK latency (diff) | |
| download | kernel-9bd110ab06e93fd01938dedd8b6015940418f0fb.tar.gz kernel-9bd110ab06e93fd01938dedd8b6015940418f0fb.zip | |
drm/amd/display: Fix TMDS 4K@60Hz YCbCr420 corruption issue
[Why]
DIG_FIFO_OUTPUT_PIXEL_MODE not being set for dcn314
resulting in incorrect timing for YCbCr4:2:0
[How]
Copy the implementation of set_pixels_per_cycle from dcn32
over to dcn314
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Tom Chung <[email protected]>
Signed-off-by: Daniel Miess <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/modules/freesync/freesync.c')
0 files changed, 0 insertions, 0 deletions