diff options
| author | Chris Park <[email protected]> | 2024-06-04 18:25:14 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2024-06-14 20:18:55 +0000 |
| commit | 3838c6736524c903a95cd1d46fcbbcb6cae8e42f (patch) | |
| tree | 31d10f8e4e291fc86cd719b56297bc3fe4c2fb6a /drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | |
| parent | drm/amd/display: fix minor coding errors where dml21 phase 5 uses wrong varia... (diff) | |
| download | kernel-3838c6736524c903a95cd1d46fcbbcb6cae8e42f.tar.gz kernel-3838c6736524c903a95cd1d46fcbbcb6cae8e42f.zip | |
drm/amd/display: On clock init, maintain DISPCLK freq
[Why]
On init if a display is connected, we need to maintain the DISPCLK
frequency Even though DPG_EN=1, the display still requires the correct
timing or it could cause audio corruption (if DISPCLK freq is reduced).
[How]
Read the current DISPCLK freq and request the same value to ensure the
timing is valid and unchanged.
Reviewed-by: Alvin Lee <[email protected]>
Acked-by: Hamza Mahfooz <[email protected]>
Signed-off-by: Chris Park <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c')
0 files changed, 0 insertions, 0 deletions