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| author | Krishna Manikandan <[email protected]> | 2021-04-06 06:01:33 +0000 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2021-04-07 18:05:48 +0000 |
| commit | a8eca8a1a524b96a49a8f7f172bfc9a8f4320e40 (patch) | |
| tree | a3434f128a4f2ec00cfcd3d3c55bff5d0886bd54 /drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | |
| parent | drm/msm/disp/dpu1: enable DATA_HCTL_EN for sc7280 target (diff) | |
| download | kernel-a8eca8a1a524b96a49a8f7f172bfc9a8f4320e40.tar.gz kernel-a8eca8a1a524b96a49a8f7f172bfc9a8f4320e40.zip | |
drm/msm/disp/dpu1: increase the range of interrupts in dpu_irq_map
Currently, each register in the dpu interrupt set is allowed
to have a maximum of 32 interrupts. With the introduction
of INTF_5_VSYNC and INTF_5_UNDERRUN irqs for EDP panel,
the total number of interrupts under INTR_STATUS register
in dpu_irq_map will exceed 32. Increase the range of each
interrupt register to 64 to handle this.
This patch has dependency on the below series:
https://patchwork.kernel.org/project/linux-arm-msm/list/?series=461193
Signed-off-by: Krishna Manikandan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c')
0 files changed, 0 insertions, 0 deletions