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authorGeorge Shen <[email protected]>2022-04-15 01:29:38 +0000
committerAlex Deucher <[email protected]>2022-11-09 22:41:41 +0000
commitb7ada7ee61d3eb0ebf08089edcefdc272b5f7b1e (patch)
treec46af0c09c132732484e72e462c71840309c5b0f /drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
parentdrm/amd/display: Add margin for max vblank time for SubVP + DRR (diff)
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drm/amd/display: Populate DP2.0 output type for DML pipe
[Why] DCN3.2 DML logic uses a new output type for DP2.0, which will enable validation to pass for higher BW timings that require DP2.0 link rates. [How] Populate the DML pipe with DP2.0 output type if the signal type of the pipe_ctx is 128b/132b. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: George Shen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c')
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