KVM: x86/mmu: Exempt nested EPT page tables from !USER, CR0.WP=0 logic

Exempt nested EPT shadow pages tables from the CR0.WP=0 handling of
supervisor writes, as EPT doesn't have a U/S bit and isn't affected by
CR0.WP (or CR4.SMEP in the exception to the exception).

Opportunistically refresh the comment to explain what KVM is doing, as
the only record of why KVM shoves in WRITE and drops USER is buried in
years-old changelogs.

Cc: Jon Kohler <[email protected]>
Cc: Sergey Dyasli <[email protected]>
Reviewed-by: Jon Kohler <[email protected]>
Reviewed-by: Sergey Dyasli <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Sean Christopherson <[email protected]>

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