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| author | George Shen <[email protected]> | 2023-11-21 23:32:52 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2024-01-15 23:35:39 +0000 |
| commit | 12f72a1599dc90b7f698b6a86a477ca4f2ef1f8e (patch) | |
| tree | dbf59bfadda3fc5ed456695b3a565378e60895f5 /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | |
| parent | drm/amd/display: Fix dml2 assigned pipe search (diff) | |
| download | kernel-12f72a1599dc90b7f698b6a86a477ca4f2ef1f8e.tar.gz kernel-12f72a1599dc90b7f698b6a86a477ca4f2ef1f8e.zip | |
drm/amd/display: Add DP audio BW validation
[Why]
Timings with small HBlank (such as CVT RBv2) can result in insufficient
HBlank bandwidth for audio SDP transmission when DSC is active. This
will cause some higher bandwidth audio modes to fail.
The combination of CVT RBv2 timings + DSC can commonly be encountered
in MST scenarios.
[How]
Add DP audio bandwidth validation for 8b/10b MST and 128b/132b SST/MST
cases and filter out modes that cannot be supported with the current
timing config.
Reviewed-by: Wenjing Liu <[email protected]>
Acked-by: Alex Hung <[email protected]>
Signed-off-by: George Shen <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c')
0 files changed, 0 insertions, 0 deletions