diff options
| author | Richard Fitzgerald <[email protected]> | 2021-08-05 16:11:05 +0000 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2021-08-05 19:17:14 +0000 |
| commit | 0c2f2ad4f16a58879463d0979a54293f8f296d6f (patch) | |
| tree | 8702651cb6dcb68055b8f913a2bc5b15ae20b708 /drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | |
| parent | ASoC: cs42l42: PLL must be running when changing MCLK_SRC_SEL (diff) | |
| download | kernel-0c2f2ad4f16a58879463d0979a54293f8f296d6f.tar.gz kernel-0c2f2ad4f16a58879463d0979a54293f8f296d6f.zip | |
ASoC: cs42l42: Fix LRCLK frame start edge
An I2S frame starts on the falling edge of LRCLK so ASP_STP must
be 0.
At the same time, move other format settings in the same register
from cs42l42_pll_config() to cs42l42_set_dai_fmt() where you'd
expect to find them, and merge into a single write.
Signed-off-by: Richard Fitzgerald <[email protected]>
Fixes: 2c394ca79604 ("ASoC: Add support for CS42L42 codec")
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c')
0 files changed, 0 insertions, 0 deletions