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| author | Eric Anholt <[email protected]> | 2016-02-16 01:31:41 +0000 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2016-02-27 01:42:47 +0000 |
| commit | a7c5047d1ce178dd2b1fa577fc8909ad663d56d5 (patch) | |
| tree | a817f72b9d1334c67e92392bf0e9d426c14aab81 /drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | |
| parent | drm/vc4: Fix the name of the VSYNCD_EVEN register. (diff) | |
| download | kernel-a7c5047d1ce178dd2b1fa577fc8909ad663d56d5.tar.gz kernel-a7c5047d1ce178dd2b1fa577fc8909ad663d56d5.zip | |
drm/vc4: Fix setting of vertical timings in the CRTC.
It looks like when I went to add the interlaced bits, I just took the
existing PV_VERT* block and indented it, instead of copy and pasting
it first. Without this, changing resolution never worked.
Signed-off-by: Eric Anholt <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c')
0 files changed, 0 insertions, 0 deletions