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| author | Jouni Högander <[email protected]> | 2023-05-30 10:16:49 +0000 |
|---|---|---|
| committer | Jouni Högander <[email protected]> | 2023-06-05 07:09:24 +0000 |
| commit | b29a20f7c4995a059ed764ce42389857426397c7 (patch) | |
| tree | 1fde65d1b1686271b4e52b172930f25ecf916e22 /drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c | |
| parent | drm/i915/display: Set correct voltage level for 480MHz CDCLK (diff) | |
| download | kernel-b29a20f7c4995a059ed764ce42389857426397c7.tar.gz kernel-b29a20f7c4995a059ed764ce42389857426397c7.zip | |
drm/i915: Use 18 fast wake AUX sync len
HW default for wake sync pulses is 18. 10 precharge and 8 preamble. There
is no reason to change this especially as it is causing problems with
certain eDP panels.
v3: Change "Fixes:" commit
v2: Remove "fast wake" repeat from subject
Signed-off-by: Jouni Högander <[email protected]>
Fixes: e1c71f8f9180 ("drm/i915: Fix fast wake AUX sync len")
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8475
Reviewed-by: Luca Coelho <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c')
0 files changed, 0 insertions, 0 deletions